{"id":423,"date":"2019-10-17T04:57:52","date_gmt":"2019-10-17T04:57:52","guid":{"rendered":"http:\/\/mayank.dese.iisc.ac.in\/?page_id=423"},"modified":"2019-10-17T05:00:27","modified_gmt":"2019-10-17T05:00:27","slug":"visitors-hosted-by-msdlab","status":"publish","type":"page","link":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/visitors-hosted-by-msdlab\/","title":{"rendered":"Visitors Hosted by MSDLab"},"content":{"rendered":"<p>[et_pb_section admin_label=&#8221;section&#8221;][et_pb_row admin_label=&#8221;Row&#8221;][et_pb_column type=&#8221;4_4&#8243;][et_pb_text admin_label=&#8221;Text&#8221; background_layout=&#8221;light&#8221; text_orientation=&#8221;left&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<h2>Visitors Hosted by MSDLab<\/h2>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row admin_label=&#8221;row&#8221;][et_pb_column type=&#8221;4_4&#8243;][et_pb_text admin_label=&#8221;Text&#8221; background_layout=&#8221;light&#8221; text_orientation=&#8221;left&#8221; use_border_color=&#8221;off&#8221; border_style=&#8221;solid&#8221; disabled=&#8221;off&#8221; saved_tabs=&#8221;all&#8221; border_color=&#8221;#ffffff&#8221;]<\/p>\n<table border=\"0\" width=\"100%\" cellspacing=\"0\" cellpadding=\"0\">\n<tbody>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"center\"><strong>Name<\/strong><\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"center\"><strong>Designation &amp; Affiliation<\/strong><\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\"><strong>Date<\/strong><\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"center\"><strong>Title of talk \/ Purpose<\/strong><\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Harald Gossner<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Principle Engineer, Intel<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">15\/01\/2015<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">\u00a0Discussion on potential collaborations<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Anand Haridass<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Technical Staff Member, IBM<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">13-11-2015<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Performance beyond Moore&#8217;s Law &#8211; Open POWER<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. James Warnock<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">IBM, New York<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">10-12-2015<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">The 5GHz IBM z13 Microprocessor and L-cache chips<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Rahul M. Rao<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Technical Staff Member, IBM<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">28-06-2016<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">\u00a0&#8216;Shining&#8217; Scaling Silicon<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Ajay Joshi<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Associate Professor, Boston University<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">08-08-2016<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Energy-efficient computing at the edge of Internet of Things<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Ravi Todi<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Director, Global Foundry, Santa Clara, USA<\/p>\n<\/td>\n<td rowspan=\"3\" width=\"10%\">\n<p align=\"center\">24-02-2016<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Trends in Global Semiconductor Industry and advanced technology solutions<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. M.K. Radhakrishnan<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Founder Director, NanoeRel LLP-Technical Consultants, Singapore<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Silicon Nanodevices &#8211; Interface Physics and Analysis challenge<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Durga Mishra<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, New Jersey Institute of Technology<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Higher-k Gate stacks for sub-14nm CMOS technology<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Hideto Hidaka<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Renesas Electronics Corporation<\/p>\n<\/td>\n<td rowspan=\"2\" nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">26-09-2016<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Embedded Flash Memory: Technology, Circuits to Systems and MCU\/SOC applications<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Balaji Jayaraman<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Tech-Lead, Global Foundries, Bangalore<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">CMOS-compatible Logic Embedded High-K Charge Trap transistor<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Chandra Mouli<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Micron Technology Inc., USA<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">16-02-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Emerging Trends in NVM technologies<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Saravanan Sethuraman<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Research Engineer, IBM<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">10-05-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Memory fundamentals, Flavours of memory DIMM design methods, Server, Memory controller architecture concepts, Internals of Memory Controller, Memory subsystem design at system level and Emerging memory technologies<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Tain-Ling Ren<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, Institute of Microelectronics, Tsinghua University<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">22-05-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Novel Fabrication and Device applications of Graphene<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Fernando Guarin<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Distinguished Member of Technical Staff, Global Foundries, NY and\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Adjunct Lecturer, SUNY New Paltz<\/p>\n<\/td>\n<td rowspan=\"2\" nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">23-05-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Reliability Challenges for the qualification of Leading-Edge CMOS technologies<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Steve S. Chung<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Chair Professor, NCTU<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">A logic CMOS based Single Transistor NVM Feasible for embedded applications<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Hector J. De Los Santos<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Founder, Nano MEMS Research, LLC, CA<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">04-12-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Theory of Nano-Electron-Fluidic Logic: A new digital electronics concept<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Murthy S. Gudipati<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Principal Scientist, JPL-NASA<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">15-12-2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Ask me anything except politics<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Deji Akinwande<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Endowed Associate Professor, University of Texas, Austin<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">03-01-2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Established, Emerging and Non-Conventional 2D Materials, Devices and Technology<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Muhammad Mustafa Hussain<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, King Abdullah University of science and Technology<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">10-01-2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Electronics for All<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Cor Claeys<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, KU Leuven<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">17-01-2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Low frequency Noise characterization as a diagnostic tool for the characterization of advanced semiconductor Materials and devices<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof.\u00a0 Vikram Dalal<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, Iowa State University<\/p>\n<\/td>\n<td nowrap=\"nowrap\" width=\"10%\">\n<p align=\"center\">19-01-2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Recent advances in Photovoltaics technology<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Harald Gossner<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Principle Engineer, Intel, Germany<\/p>\n<\/td>\n<td width=\"10%\">\n<p align=\"center\">15\/03\/2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">\u00a0Discussion on potential collaborations<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Gianluca Boselli<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Manager, Texas Instruments, USA<\/p>\n<\/td>\n<td width=\"10%\">\n<p align=\"center\">1\/04\/2017<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">\u00a0Discussion on potential collaborations<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Dr. Andre Montree<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Senior Director, NXP, Netherlands<\/p>\n<\/td>\n<td width=\"10%\">\n<p align=\"center\">1\/05\/2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">\u00a0Discussion on potential collaborations<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td nowrap=\"nowrap\" width=\"17%\">\n<p align=\"left\">Prof. Anil Kottantharayil<\/p>\n<\/td>\n<td width=\"27%\">\n<p align=\"left\">Professor, IITB<\/p>\n<\/td>\n<td width=\"10%\">\n<p align=\"center\">19-01-2018<\/p>\n<\/td>\n<td width=\"44%\">\n<p align=\"left\">Performance losses in PV modules operating in the field<\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section]<\/p>\n","protected":false},"excerpt":{"rendered":"<p>[et_pb_section admin_label=&#8221;section&#8221;][et_pb_row admin_label=&#8221;Row&#8221;][et_pb_column type=&#8221;4_4&#8243;][et_pb_text admin_label=&#8221;Text&#8221; background_layout=&#8221;light&#8221; text_orientation=&#8221;left&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;] Visitors Hosted by MSDLab [\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row admin_label=&#8221;row&#8221;][et_pb_column type=&#8221;4_4&#8243;][et_pb_text admin_label=&#8221;Text&#8221; background_layout=&#8221;light&#8221; text_orientation=&#8221;left&#8221; use_border_color=&#8221;off&#8221; border_style=&#8221;solid&#8221; disabled=&#8221;off&#8221; saved_tabs=&#8221;all&#8221; border_color=&#8221;#ffffff&#8221;] Name Designation &amp; Affiliation Date Title of talk \/ Purpose Dr. Harald Gossner Senior Principle Engineer, Intel 15\/01\/2015 \u00a0Discussion on potential collaborations Dr. Anand Haridass Senior Technical Staff Member, IBM [&hellip;]<\/p>\n","protected":false},"author":5,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_et_pb_use_builder":"on","_et_pb_old_content":"","_et_gb_content_width":""},"_links":{"self":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/pages\/423"}],"collection":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/comments?post=423"}],"version-history":[{"count":2,"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/pages\/423\/revisions"}],"predecessor-version":[{"id":426,"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/pages\/423\/revisions\/426"}],"wp:attachment":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/mayank\/wp-json\/wp\/v2\/media?parent=423"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}