Professor Santanu Mahapatra

Santanu Mahapatra received his B.E. (Bachelor of Engineering) degree from Jadavpur University, Kolkata, in the field of Electronics and Telecommunication in 1999, M. Tech (Master of Technology) degree in the field of Electrical Engineering (specializing in Microelectronics) in 2001 from Indian Institute of Technology (IIT) Kanpur, and Ph.D. degree from Swiss Federal Institute of Technology Lausanne (EPFL) in 2005. For his Ph.D. dissertation he worked on the modeling of Single Electron Transistor (SET) and its co-simulation and co-design with CMOS.

He joined Department of Electronic Systems Engineering (formerly CEDT), at Indian Institute of Science (IISc), Bangalore, India, as an assistant professor in August 2005 and promoted to associate professor and then full professor rank in September 2010 and December 2015 respectively. He founded Nano Scale Device Research Laboratory in 2006, where his research team engaged in modeling of carrier transports in nano materials at circuit, device and atomistic level. His research interests include two dimensional channel transistors, energy efficient electronic switches and energy-storage at nano-scale. He is the author of the book Hybrid CMOS Single Electron Transistor Device and Circuit Design. He received IBM Faculty award in 2007, Microsoft Research India Outstanding Faculty Award in 2007 and the associateship of Indian Academy of Sciences in 2009. He is also the recipient of Ramanna Fellowship (2012 to 2015) in the discipline of electrical sciences from Department of Science and Technology, Government of India for his contribution in compact modeling.

Link to Google Scholar

Courses Offered:

• E3 226 (Earlier 225) – Art of Compact Modeling (August Term)
  Syllabus: Band theory of solids, carrier transport mechanism, P-N junction diode, MOS Capacitor Theory, C-V characteristics, MOSFET operation, Types of compact models, Input Voltage Equation, Charge Linearization, Charge Modeling, Concept of Core Model, Quasi-static and Non-quasi-static Model, Introduction to Verilog-A, Brief overview of EKV and PSP
• E3 268 – Advanced CMOS and beyond CMOS (January Term)
  Syllabus: ITRS, Problems with short channel devices: SCE, DIBL, leakage, Breakthrough Solutions: SOI, High K, metal gate, Non-classical MOSFET, CMOS scaling limit, Emerging nanotechnologies: SET, QCA, RSQF, RTD.

Sponsored Research Projects:

• Principal Investigator of the project “Exploration of novel spintronic devices based on two-dimensional magnets”, funded by SERB-DST,  2021-2023.
• Principal Investigator of the project “Exascale Reactive Molecular Dynamics Based Investigation of Resistive Switching in Two-Dimensional Materials”, funded by National Supercomputing Mission (NSM), 2021-2023.
• Principal Investigator of the project “Computational screening of 2D materials for applications in integrated circuits”, funded by MATRICS-SERB, 2020-2023.
• Principal Investigator of the project “2D Material Informatics for lithium ion storage”, funded by Technology Mission Division Energy & Water DST, 2019-2022.
• BRICS STI Cooperation: Electronic synapses based on two dimensional materials for neuromorphic computing, 2019-2022.
• Indo-Austria Mobility Grant with TU-Wein, June 2018-May 2020.
• Principal Investigator of the project “Quantum transport equation based next-generation compact model”, funded by CSIR, Duration: May 2018 to April 2021.
• Principal Investigator of the project “First principles based exploration of atomically thin layered material for next generation Li ion battery”, funded by ISRO-IISC Space Technology Cell, Duration: April 2017 to March 2020.
• Principal Investigator of the project “Understanding electron and phonon transport in hetero atomic layer transistors”, funded by SERB-DST, Duration: Dec 2015 to Dec 2018.
• Principal Investigator of the project “Performance evaluation of (MOS)2FET through novel device simulator development”, funded by SERB-DST, Duration: Dec 2012 to Nov 2015.
• “Professional Compact Models for Next Generation Multiple-Gate MOS Transistors”, funded by Department of Science and Technology (DST) under Ramanna Fellowship scheme (duration: 2012 to 2015).
• Principal Investigator of the project “Ab initio analytical study of the effect of strain on silicon” funded by ISRO-IISC Space Technology Cell, (duration: 2010 to 2013)
• Principal Investigator of the project “Compact modeling of asymmetric double gate nano scale transistors” funded by IFCPAR (Indo French Centre for the Promotion of Advanced Research) jointly with ISEP-Paris (duration: 2010 to 2013).
• Co-Investigator of the project “Compact modeling of Carbon Nanotube transistors and their interconnects”, funded by Department of Science and Technology (DST) under Fasttrack scheme, India (duration: 2009 to 2012).
• Principal Investigator of the project, “Computationally Efficient Analytical Solution of Non-Linear Poisson Equation for Compact Modeling of Nano-Scale Multi-Gate Transistors”, funded by Department of Science and Technology (DST), India (duration: 2009 to 2012)
• Principal Investigator of the project, “Single Electronics: Towards Hybrid CMOS-SET circuit design”, funded by Council of Scientific and Industrial Research (CSIR), India (duration: 2007 to 2010)
• Principal Investigator of the project, “Device reliability modeling and simulation for sub 65nm technology nodes”, funded by IBM India Pvt Ltd. (duration: 2007 to 2010)
• Principal Investigator of the project “Compact Modeling and Simulation of Silicon Nanowire “ funded by Department of Science and Technology (DST) under Fasttrack scheme, India (duration: 2006 to 2009)

Journal Publications

1. Sanchali Mitra, and Santanu Mahapatra, “Atomistic description of conductive bridge formation in two-dimensional material based memristor”, npj 2D Materials and Applications, Nature portfolio, 2024. [Nature Collection: Neuromorphic Computing Devices] 
2. Vaishnavi Vishnubhotla, Santanu Mahapatra, and Sitangshu Bhattacharya, “Excitonic properties of clustered-P1 borophene”, Physical Review B, Vol. 108, pp. 245107, 2023. 
3. Tejas Govind Indani, Kunal Narayan Chaudhury, Sirsha Guha and Santanu Mahapatra, “Physically constrained learning of MOS capacitor electrostatics”, Journal of Applied Physics, Vol. 134, pp. 184903, 2023. [TechXplore].
4. Arnab Kabiraj and Santanu Mahapatra, “Realizing unipolar and bipolar intrinsic skyrmions in MXenes from high-fidelity first-principles calculations”, npj Computational Materials, Nature portfolio, Vol. 9, pp. 173, 2023.
5. Vaishnavi Vishnubhotla, Sanchali Mitra, and Santanu Mahapatra, “First-principles based study of 8-Pmmn Borophene and metal interface,” Journal of Applied Physics, Vol. 134, pp. 034301, 2023.
6. Sirsha Guha, Arnab Kabiraj and Santanu Mahapatra, “Discovery of clustered-P1 borophene and its application as the lightest high-performance transistor”. ACS Applied Materials & Interfaces, Vol. 15, pp. 3182, 2023. [Science X Dialog]
7. Sanchali Mitra and Santanu Mahapatra, “Insights to nonvolatile resistive switching in monolayer hexagonal boron nitride”, Journal of Applied Physics, Vol. 132, pp. 224302, 2022
8. Arnab Kabiraj, Tripti Jain and Santanu Mahapatra, “Massive Monte Carlo simulations-guided interpretable learning of two-dimensional Curie temperature”, Patterns, Cell Press, Vol. 3, pp. 100625, 2022. [Cover Page December Issue][Nanowerk Spotlights]
9. Sanchali Mitra and Santanu Mahapatra, “Schottky-Mott limit in graphene inserted 2D semiconductor-metal interfaces”, Journal of Applied Physics, Vol. 132, pp. 145301, 2022. 
10. Sirsha Guha, Arnab Kabiraj and Santanu Mahapatra, “High-throughput design of functional-engineered MXene transistors with low-resistive contacts”. npj Computational Materials, Nature portfolio, Vol. 8, pp. 202, 2022.[Nanowerk Spotlights][Research Highlights in Nature India]
11. Shreeja Das, Arnab Kabiraj  and Santanu Mahapatra, “Room temperature giant magnetoresistance in half-metallic Cr2C based two-dimensional tunnel junctions”, Nanoscale, 2022.
12. Vaishnavi Vishnubhotla, Arnab Kabiraj, Aninda J Bhattacharyya, and Santanu Mahapatra, “Global Minima Search for Sodium and Magnesium Adsorbed Polymorphic Borophene”, The Journal of Physical Chemistry C, 2022.
13. Arnab Kabiraj and Santanu Mahapatra, “High-throughput assessment of two-dimensional electrode materials for energy storage devices”, Cell Reports Physical Science, Vol. 3, pp. 100718, 2022.[Nanowerk Spotlights][Research Highlights in Nature India][Times of India]
14. Sanchali Mitra, Om Kesharwani and Santanu Mahapatra, “Ohmic to Schottky conversion in monolayer tellurene-metal interface via graphene insertion”, The Journal of Physical Chemistry C, Vol. 125, pp. 12975-12982, 2021.
15. Sanchali Mitra, Arnab Kabiraj and Santanu Mahapatra, “Theory of nonvolatile resistive switching in monolayer molybdenum disulfide with passive electrodes”, npj 2D Materials and Applications, Nature portfolio, 2021. [ First and second authors made equal contributions]. [Nanowerk Spotlights][Science X Dialog][Research Highlights in Nature India][Nature Collection: Neuromorphic Computing Devices] 
16. Arnab Kabiraj, Aninda J Bhattacharyya, and Santanu Mahapatra, “Thermodynamic insights into polymorphism-driven lithium-ion storage in monoelemental 2D materials”,  The Journal of Physical Chemistry Letters,  Vol. 12, pp. 1220, 2021.
17. Biswapriyo Das  and Santanu Mahapatra, “A predictive model for high-frequency operation of two-dimensional transistors from first-principles”, Journal of Applied Physics, Vol. 128, pp. 234502, 2020.
18. Arnab Kabiraj and Santanu Mahapatra, “Machine Intelligence Driven High-Throughput Prediction of 2D Charge Density Wave Phases”, The Journal of Physical Chemistry Letters, Vo. 11, pp. 6291, 2020. [Nanowerk Spotlights][Science X Dialog][Virtual Issue: Machine Learning in Physical Chemistry]
19. Biswapriyo Das, Diptiman Sen  and Santanu Mahapatra, “Tuneable quantum spin Hall states in confined 1T’  transition metal dichalcogenides”, Scientific Reports, Nature portfolio, 2020. [Nature collection: Top 100 in Physics]
20. Arnab Kabiraj, Mayank Kumar  and Santanu Mahapatra, “High-throughput discovery of high Curie point two-dimensional ferromagnetic materials”, npj Computational Materials, Nature portfolio, 2020. [News in Phys.org][Research Highlights in Nature India] [Featured in Science Reporter]
21. Arnab Kabiraj and Santanu Mahapatra, “Intercalation driven reversible switching of 2D magnetism”, The Journal of Physical Chemistry C, Vol. 124, No. 1146-1157, 2020.
22. Madhuchhanda Brahma, Arnab Kabiraj, Marc Bescond and Santanu Mahapatra, “Phonon limited anisotropic quantum transport in phosphorene field effect transistors”  Journal of Applied Physics, Vol. 126, No. 114502, 2019. [Editor’s Pick] [Featured in Vigyan Prasar]
23. Sahil Garg, Bipan Kaushal, Sanjeev Kumar, S.R Kasjoo, Santanu Mahapatra and Arun K. Singh, “Extraction of trench capacitance and reverse recovery time of InGaAs self-switching diode”  IEEE Transactions on Nanotechnology, Vo. 18, pp. 925, 2019.
24. Arnab Kabiraj and Santanu Mahapatra, “High-throughput first-principles-calculations based estimation of lithium ion storage in monolayer rhenium disulfide”  Communications Chemistry, Nature portfolio, 2018. [Nature collection: Nobel Prize in Chemistry 2019][Nature collection: Energy Storage and Conversion][Nature collection: Chemistry in 2D]
25. Biswapriyo Das and Santanu Mahapatra, “An Atom-to-Circuit modeling approach to all-2D Metal-Insulator Semiconductor Field-Effect Transistors” npj 2D Materials and Applications, Nature portfolio,Vol.2, No.28, 2018.
26. Madhuchhanda Brahma, Arnab Kabiraj, Dipankar Saha and Santanu Mahapatra, “Scalability assessment of Group-IV mono-chalcogenide based tunnel FET”  Scientific Reports,  Nature portfolio, 2018.
27. Ananda Sankar Chakraborty and Santanu Mahapatra, “Compact Model for Low Effective Mass Channel Common Double-Gate MOSFET,”  IEEE Transactions on Electron Devices, Vol. 65, No.3, pp. 888-894, 2018.
28. Madhuchhanda Brahma, Marc Bescond, Demetrio Logoteta, Ram Krishna Ghosh and Santanu Mahapatra, “ Germanane MOSFET for sub-Deca Nanometer High Performance Technology Nodes” IEEE Transactions on Electron Devices, Vol. 65, No.3, pp. 1198-1204,  2018.
29. Arup Paul , Manabendra Kuiri , Dipankar Saha, Biswanath Chakraborty , Santanu Mahapatra, A.K. Sood and Anindya Das, “Photo-tunable Transfer Characteristics in MoTe2-MoS2 Vertical Hetero-structure”  npj 2D Materials and Applications, Nature portfolio journal, Vol.1,  2017.
30. Dipankar Saha and Santanu Mahapatra, “Anisotropic transport in 1T’ monolayer MoS2 and its metal interfaces” RSC Physical Chemistry Chemical Physics, Vol. 19, pp. 10453, 2017.
31. Dipankar Saha and Santanu Mahapatra, “Asymmetric Junctions in Metallic-Semiconducting-Metallic Heterophase MoS2,”  IEEE Transactions on Electron Devices, Vol. 64, No. 5, pp. 2457-2460, 2017.
32. Ananda Sankar Chakraborty and Santanu Mahapatra, “Surface Potential Equation for Low Effective Mass Channel Common Double-Gate MOSFET,”  IEEE Transactions on Electron Devices, Vol.64, No.4, pp. 1519-1527, 2017.
33. Adam Makosiej, Navneet Gupta, Naga Vakul, Andrei Vladimirescu, Sorin Cotofana, Santanu Mahapatra, Amara Amara, and Costin Anghel, “Ultra-Low Leakage SRAM Design with sub-32nm Tunnel FETs for Low Standby Power Applications,” IET Micro & Nano Letters, Vol. 11, Issue 12, pp. 828-831, 2016.
34. Dipankar Saha and Santanu Mahapatra “Atomistic modeling of the metallic-to-semiconducting phase boundaries in monolayer MoS2,” Applied Physics Letters, Vol 108, pp. 253106, 2016.
35. Dipankar Saha and Santanu Mahapatra, “Theoretical insights on the electro-thermal transport properties of monolayer MoS2 with line defects,” Journal of Applied Physics, Vol. 119, pp. 134304, 2016.
36. Anuja Chanana and Santanu Mahapatra, “Density Functional Theory based Study of Chlorine Doped WS2 -metal Interface,” Applied Physics Letters , Vol. 108, pp. 103107, 2016.
37. Dipankar Saha and Santanu Mahapatra, “Analytical Insight into the Lattice Thermal Conductivity and Heat Capacity of Monolayer MoS2,” Physica E, Vol. 83, pp. 455–460, 2016.
38. Anuja Chanana and Santanu Mahapatra, “Prospects of Zero Schottky Barrier Height in a Graphene Inserted MoS2-Metal Interface,” Journal of Applied Physics , Vol. 119, pp. 014303, 2016.
39. Neha Sharan and Santanu Mahapatra, “Compact Noise Modeling for Common Double Gate MOSFET Adapted to Gate Oxide Thickness Asymmetry,” IET Circuits, Devices & Systems , Vol. 10, No. 1, pp. 62Ð67, 2016.
40. Anuja Chanana and Santanu Mahapatra, “Theoretical Insights to Niobium Doped Monolayer MoS2-Gold Contact,” IEEE Transactions on Electron Devices , Vol 62, No 7, pp. 2346-2351, 2015.
41. Amretashis Sengupta, Anuja Chananna and Santanu Mahapatra, “Phonon scattering limited performance of monolayer MoS2 and WSe2 n-MOSFET,” AIP Advances, Vol.2, Issue 5, pp. 027101, 2015.
42. Amretashis Sengupta, Dipankar Saha, Thomas A. Niehaus and Santanu Mahapatra, “Effect of line defects on the electrical transport properties of monolayer MoS2 sheet,” IEEE Transactions on Nanotechnology, Vol 14, No 1, pp. 51-56, 2015.
43. Anuja Chanana and Santanu Mahapatra, “First Principle Study of Metal Contact to Monolayer Black Phosphorous,” Journal of Applied Physics Vol.116, pp. 204302 (1-9), 2014.
44. Sitangshu Bhattacharya, Dipankar Saha, Aveek Bid, and Santanu Mahapatra, “A Continuous Electrical Conductivity Model for Monolayer Graphene from Near Intrinsic to Far Extrinsic Region,” IEEE Transactions on Electron Devices , Vol. 61, No. 11, pp. 3646 -3653, 2014.
45. Dipankar Saha, Amretashis Sengupta, Sitangshu Bhattacharya and Santanu Mahapatra, “Impact of Stone-Wales and lattice vacancy defects on the electro-thermal transport of the free standing structure of metallic ZGNR”, Journal of Computational Electronics (Springer), Vol. 13, No. 4, pp. 862–871, 2014.
46. Neha Sharan and Santanu Mahapatra, “A Short Channel Common Double Gate MOSFET Model Adapted to Gate Oxide Thickness Asymmetry”, IEEE Transactions on Electron Devices, Vol. 61, No.8, pp. 2732-2737, 2014.
47. Ram Krishna Ghosh, Madhuchhanda Brahma, Santanu Mahapatra, “Germanane : a ‘Low Effective Mass’- ‘High Bandgap’ 2-D Channel Material for Future FETs”, IEEE Transactions on Electron Devices, Vol. 61, No.7, pp 2309-2315, 2014.
48. Anuja Chananna, Amretashis Sengupta and Santanu Mahapatra, “Performance Analysis of Boron Nitride Embedded Armchair Graphene Nanoribbon MOSFET with Stone-Wales Defects”, Journal of Applied Physics, Vol. 115, pp. 034501, 2014.
49. Neha Sharan and Santanu Mahapatra, “Continuity Equation Based Nonquasi-static Charge Model for Independent Double Gate MOSFET” Journal of Computational Electronics (Springer), Vol.13, Issue 2, pp 353-359, 2014.
50. Ramkrishna Ghosh and Santanu Mahapatra, “Monolayer Transition Metal Dichalcogenide Channel Based Tunnel Transistor”, IEEE Journal of the Electron Devices Society, Vol. 1, No. 10, pp. 175-180, 2013.
51. Amretashis Sengupta and Santanu Mahapatra, “Negative differential resistance and effect of defects and deformations in MoS2 armchair nanoribbon MOSFET”, Journal of Applied Physics, Vol. 114, pp. 194513, 2013.
52. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Solution of Time Dependent Joule Heat Equation for a Graphene Sheet under Thomson Effect”, IEEE Transactions on Electron Devices, Vol. 60., No. 10, pp. 3548-3553, 2013.
53. Amretashis Sengupta, Ram Krishna Ghosh, Santanu Mahapatra, “Performance Analysis of Strained Monolayer MoS2 MOSFET,” IEEE Transactions on Electron Devices, Vol. 60., No. 9., pp. 2782-2787, 2013.
54. Ram Krishna Ghosh and Santanu Mahapatra, “Proposal for Graphene-Boron Nitride Heterobilayer Based Tunnel FET”, IEEE Transactions on Nanotechnology, Vol. 12, No. 5, pp. 665-667, 2013.
55. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Modeling of Temperature and Field Dependent Electron Mobility in a Single Layer Graphene Sheet”, IEEE Transactions on Electron Devices, Vol.60, No. 8, pp. 2695 – 2698, 2013.
56. Neha Sharan and Santanu Mahapatra, “Non-Quasi-Static Charge Model for Common Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry”, IEEE Transactions on Electron Devices, Vol. 60, No.7, pp. 2419-2422, 2013.
57. Amrethashis Sengupta and Santanu Mahapatra, “Performance limits of transition metal dichalcogenide (MX2) nanotube surround gate ballistic field effect transistors, “Journal of Applied Physics, Vol. 113, pp. 194502, 2013.
58. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Thermoelectric Performance of a Single Layer Graphene Sheet for Energy Harvesting”, IEEE Transactions on Electron Devices, Vol. 60, No.6, pp. 2064-2070, 2013.
59. Ramkrishna Ghosh, Sitangshu Bhattacharya and Santanu Mahapatra,”k.p based closed form energy band gap and transport electron effective mass model for [100] and [110] relaxed and strained Silicon nanowire”, Solid State Electronics, Vol. 80, pp. 124-134, 2013.
60. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “A physics based flexural phonon dependent thermal conductivity model for single layer graphene”, IOP Semiconductor Science and Technology, Vol. 28, pp. 015009 (1-6), 2013.
61. Ramkrishna Ghosh and Santanu Mahapatra, “Direct Band-to-band tunneling in reverse biased MoS2 nanoribbon p-n junctions”, IEEE Transactions on Electron Devices, Vol. 60, No.1, pp. 274-279, 2013.
62. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Physics-Based Solution for Electrical Resistance of Graphene under Self-Heating Effect”, IEEE Transactions on Electron Devices, Vol. 60, No.1, pp. 502-505, 2013.
63. Aby Abraham, Pankaj Thakur and Santanu Mahapatra, “Bipolar Poisson Solution for Independent Double-Gate MOSFET”, IEEE Transactions on Electron Devices, Vol. 60, No.1, pp. 498-501, 2013.
64. Srivatsava Jandhyala and Santanu Mahapatra, “Inclusion of the Body Doping in the Compact Models for Fully-Depleted Common Double Gate MOSFET Adapted to Gate-oxide Thickness Asymmetry”, IET Electronics Letters, Vol. 48, No. 13, pp. 794, 2012.
65. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Theoretical Estimation of Electro-migration in Metallic Carbon Nanotubes Considering Self-Heating-Effect”, IEEE Transactions on Electron Devices, Vol. 59, No. 9, pp. 2476-2482, 2012.
66. Srivatsava Jandhyala, Aby Abraham, Costin Anghel and Santanu Mahapatra, “Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET”, IEEE Transactions on Electron Devices Vol. 59, No. 7, pp. 1974, 2012.
67. Ramkrishna Ghosh, Sitangshu Bhattacharya and Santanu Mahapatra,” Physics based band gap model for relaxed and strained [100] silicon nanowires”, IEEE Transactions on Electron Devices, Vol. 59, No. 6, pp. 1765-1772, 2012.
68. Srivatsava Jandhyala, Rutwick Kashyap, Costin Anghel and Santanu Mahapatra, “A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry”, IEEE Transactions on Electron Devices, Vol. 59, No. 4, pp. 1002-1007, 2012.
69. Aby Abraham, Srivatsava Jandhyala and Santanu Mahapatra, “Improvements in Efficiency of Surface Potential Computation for Independent DG MOSFET”, IEEE Transactions on Electron Devices, Vol. 59, No.4, pp. 1199-1202, 2012.
70. Sitangshu Bhattacharya and Santanu Mahapatra,”Quantum Capacitance in Bilayer Graphene Nanoribbon”, Physica E, Vol. 44, Issues 7–8, pp. 1127–1131, 2012.
71. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Analytical Solution of Joule Heating Equation for Metallic Single Walled Carbon Nanotube Interconnects”, IEEE Transactions on Electron Devices, Vol. 58, No. 11, pp. 3991-3996, 2011.
72. Srivatsava Jandhyala and Santanu Mahapatra, “An efficient robust algorithm for the surface potential calculation of Independent DG MOSFET”, IEEE Transactions on Electron Devices, Vol. 58, No. 6, pp. 1663-1671, 2011.
73. Sitangshu Bhattacharya, Amalraj Rex and Santanu Mahapatra “Physics Based Thermal Conductivity Model for Metallic Single Walled Carbon Nanotube Interconnects”, IEEE Electron Device Letters, Vol. 32, No. 2, pp. 203-205, 2011.
74. Pankaj Thakur and Santanu Mahapatra, “Large Signal Model For Independent DG MOSFET”, IEEE Transactions on Electron Devices, Vol. 58, No. 1, pp. 46-52, 2011.
75. Rakesh Kumar P and Santanu Mahapatra, “Analytical Modeling of Quantum Threshold Voltage for Triple Gate MOSFET”, Solid State Electronics, Vol. 54, 1586–1591 2010.
76. Sudipta Sarkar, Ananda Shankar Roy and Santanu Mahapatra, “Unified Large and Small Signal Non Quasi-Static Model for Long Channel Symmetric DG MOSFET”, Solid State Electronics, Vol. 54, pp. 1421-1429, 2010
77. Sitangshu Bhattacharya and Santanu Mahapatra, “Negative Differential Conductance and Effective Electron Mass in Highly Asymmetric Ballistic Bilayer Graphene Nanoribbon” Physics Letters A, Vol. 374, pp. 2850–2855, 2010.
78. Sitangshu Bhattacharya and Santanu Mahapatra, Simplified Theory of Carrier Back-Scattering in Semiconducting Carbon Nanotubes: a Kane’s Model Approach, Journal of Applied Physics, Vol.107, Issue 9, pp. 094314, 2010. Also published in Virtual Journal of Nanoscale Science & Technology, Vol. 21, Issue 10, 2010
79. Surya Shankar Dan and Santanu Mahapatra, “Impact of Energy Quantisation in SET Island on Hybrid CMOS-SET Integrated Circuits”, IET Circuits Devices Systems, Vol. 4, Issue 5, pp. 449–457, 2010.
80. Sivakumar Bondada, Soumyendu Raha and Santanu Mahapatra, An efficient reduction algorithm for computation of interconnect delay variability for statistical timing analysis in clock tree planning, Sadhana – Academy Proceedings in Engineering Science Vol. 35, Part 4, pp. 407–418, 2010.
81. Sitangshu Bhattacharya and Santanu Mahapatra, “Analytical Study of Low Field Diffusive Transport in Highly Asymmetric Bilayer Graphene Nanoribbon”, Vol. 10, No. 3, pp. 409-416, IEEE Transactions on Nanotechnology, 2010.
82. Avinash Sahoo, Pankaj Kumar Thakur, and Santanu Mahapatra, “A Computationally Efficient Generalized Poisson Solution For Independent Double Gate Transistors”, IEEE Transactions on Electron Devices, Vol. 57, no.3, pp. 632-636, 2010.
83. Rakesh Kumar P and Santanu Mahapatra, “Quantum Threshold Voltage Modeling of Short Channel Quad Gate Silicon Nanowire Transistor”, Vol. 10, No. 1, pp. 121-128, IEEE Transactions on Nanotechnology, 2010.
84. Surya Shankar Dan and Santanu Mahapatra, “Analysis of Energy Quantization Effects on Single Electron Transistor Circuits”, in IEEE Transactions on Nanotechnology, Vol.9, No.1, pp. 38-45, 2010.
85. Surya Shankar Dan and Santanu Mahapatra, “Impact of Energy Quantization Effects on the Performance of Current-Biased SET Circuits”, IEEE Transactions on Electron Devices , Vol 56, No 8, pp.1562-1566, 2009.
86. Surya Shankar Dan and Santanu Mahapatra, “Modeling and Analysis of Energy Quantization Effects on Single Electron Inverter Performance”, Physica E: Low-dimensional Systems and Nanostructures, Vol. 41, Issue 8, Pages 1410-1416, 2009.
87. Sitangshu Bhattacharya and Santanu Mahapatra, “Influence of Band Non- Parabolicity on Few Ballistic Properties of III-V Quantum Wire Field Effect Transistors Under Strong Inversion”, Journal of Computational and Theoretical Nanoscience, Vol.6, No.7, pp. 1605-1616, 2009.
88. Biswajit Ray and Santanu Mahapatra, “Modeling of Channel Potential and Subthreshold Slop of Symmetric Double Gate Transistor”, IEEE Transactions on Electron Devices, Vol. 56, No. 2, pp. 260-266, 2009.
89. Ratul Kumar Baruah and Santanu Mahapatra, “Justifying threshold voltage definition for undoped body transistors through “crossover point” concept”, Physica B: Condensed Matter, Volume 404, Issues 8-11, 1 May 2009, Pages 1029-1032.
90. Sitangshu Bhattacharya, Surya Shankar Dan and Santanu Mahapatra, “Influence of band non-parabolicity on the quantized gate capacitance in delta-doped MODFED of III-V and related materials,” Journal of Applied Physics, Vol. 104, No. 7, pp. 074304-1 to 074304-9, 2008.
91. Biswajit Ray and Santanu Mahapatra, “Modeling and analysis of body potential of cylindrical Gate-All-Around nanowire transistor”, IEEE Transactions on Electron Devices, Vol. 55, No. 9, pp. 2409-2416, 2008.
92. Nayan B Patel, Ramesha A and Santanu Mahapatra, “Drive Current Boosting of n-type Tunnel FET with Strained SiGe layer at Source”, Microelectronics Journal Vol 39, Issue 12, PP. 1671-1677, 2008.
93. Chaitanya Sathe, Surya Shankar Dan, and Santanu Mahapatra, “Assessment of SET logic Robustness through Noise Margin Modeling”, IEEE Transactions on Electron Devices, Vol. 55, No. 3, pp. 909-915, 2008.
94. Serge Ecoffey, Didier Bouvet, Santanu Mahapatra, Gilles Reimbold, and Adrian Mihai Ionescu, “Electrical Conduction in 10nm-thin Polysilicon Wires from 4K to 400K and their Operation for Hybrid Memory”, Japanese Journal of Applied Physics Part 1, Vol. 45, No. 6, June 2006.
95. Santanu Mahapatra and Adrian Mihai Ionescu, “Realization of multiple value logic and memory by hybrid SETMOS architecture”, IEEE Transactions in Nanotechnology, Vol. 4, No. 6, pp. 705 – 714, 2005.
96. Serge Ecoffey, Vincent Pott, Santanu Mahapatra, Didier Bouvet, Pierre Fazan, Adrian Mihai Ionescu, “A Hybrid CMOS-SET co-fabrication Platform Using Nanograin Polysilicon Wires”, Microelectronic Engineering, Vol 78-79, pp.239-243, 2005.
97. Santanu Mahapatra, Vaivabh Vaish, Christoph Wasshuber, Kaustav Banerjee and Adrian Mihai Ionescu, “Analytical Modelling of Single Electron Transistor (SET) for Hybrid CMOS-SET Analog IC Design”, IEEE Transactions on Electron Device, Vol. 51, No. 11,pp. 1772-1782, 2004.
98. Santanu Mahapatra and Adrian Mihai Ionescu, “A Novel Elementary Single Electron Transistor Negative Differential Resistance Device”, Japanese Journal of Applied Physics, Part 1, Vol. 43, No. 2, pp. 538-539, 2004.
99. Adrian Mihai Ionescu, Santanu Mahapatra, and Vincent Pott, “Hybrid SETMOS Architecture with Coulomb Blockade Oscillations and High Current Drive”, IEEE Electron Device Letters, Vol.25, No.6, pp. 411-413, 2004.
100. Santanu Mahapatra, Adrian Mihai Ionescu, and Kaustav Banerjee, “A Quasi-Analytical SET Model for Few Electron Circuit Simulation”, IEEE Electron Device Letters, Vol.23, No.6, pp. 366-368, June 2002.
101. Santanu Mahapatra, Adrian Mihai Ionescu, Kaustav Banerjee and Michel Declercq, “A SET Based Quantizer Circuit for Digital Communications”, IEE Electronics Letters, Vol. 38, No. 10, pp. 443-445, May 2002.

Patent

R.Verma, S. Bhattacharya and S. Mahapatra, ” A graphene based thermoelectric generator”, Indian patent number 404071, 28th August 2022 .

Conference Publications

1. Madhuchhanda Brahma, Arnab Kabiraj and Santanu Mahapatra, ‘Insights on anisotropic dissipative quantum transport in n-type Phosphorene MOSFET’, IEEE International Conference on VLSI Design 2019, Delhi, India.
2. Sahil Garg, Bipan Kaushal, Arun K. Singh, Sanjeev Kumar and Santanu Mahapatra, “Parametric Optimization of Self-Switching Diode”,  IEEE Nanotechnology Materials and Devices Conference (NMDC) 2018, USA.
3. Ananda Sankar Chakraborty, Srivatsava Jandhalya and Santanu Mahapatra, ‘Analytical Surface Potential Solution for Low Effective Mass Channel Common Double Gate MOSFET ’, Workshop of Compact Modeling, TechConnect Briefs, Volume: 4, Pages: 224 – 227, 2018.
4. Richa Chakravarty, Dipankar Saha and Santanu Mahapatra, “New Asymmetric Atomistic Model for the Analysis of Phase-engineered MoS2-Gold Top Contact”, IEEE International Conference on VLSI Design 2018, Pune, India
5. Anuja Chanana, Amretashis Sengupta, and Santanu Mahapatra, “Analysis of Vacancy Defects in Hybrid Graphene-Boron Nitride Armchair Nanoribbon Based n-MOSFET at Ballistic Limit,” International Workshop on Computational Electronics (IWCE) 2015., USA.
6. Chethan Kumar M, Neha Sharan, and Santanu Mahapatra, “indDG: A New Compact Model for Common Double Gate MOSFET adapted to Gate Oxide Thickness Asymmetry,” IEEE CONECCT 2015 [Best paper award] , Bangalore, India.
7. Neha Sharan, and Santanu Mahapatra, “NQS modeling of Independent DG MOSFET by relaxation time approximation approach,” Workshop on Compact Modeling, 2014, USA.
8. Dipankar Saha and Santanu Mahapatra, “Modeling of sheet-concentration and temperature-dependent resistivity of a suspended monolayer graphene,” IEEE International Conference on Emerging Electronics 2014, India.
9. Neha Sharan and Santanu Mahapatra, “Small signal Non Quasi-static model for Common Double Gate MOSFET adapted to gate oxide thickness asymmetry,” IEEE International Conference on VLSI Design 2014, India.
10. Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, “Electro-thermal Aspects in Carbon Based Interconnects,” TechConnect World, Summit and Showcase 2013, Nanotech Conference and Expo 2013 , Washington DC, USA.
11. Pankaj Kumar Thakur , and Santanu Mahapatra, “Modeling and Analysis of MOS Capacitor Controlled by Independent Double Gates,” Workshop on Compact Modeling, 2012, USA.
12. Sudipta Sarkar, Ananda Shankar Roy and Santanu Mahapatra, “A Non Quasi-Static Small Signal Model for Long Channel Symmetric DG MOSFET”, International Conference on VLSI Design 2010 , India.
13. Sitangshu Bhattacharya and Santanu Mahapatra, “Does Nanotubes and Nanowires Exhibit Negative Capacitances?”, appearing in International Workshop on Physics for Semiconductor Devices (IWPSD) 2009 , India.
14. Surya Shankar Dan and Santanu Mahapatra, “Impact of Energy Quantization in SET island on Hybrid CMOS-SET Integrated Circuits”, appearing in International Workshop on Physics for Semiconductor Devices (IWPSD) 2009 , India.
15. Surya Sankar Dan and Santanu Mahapatra, “Analysis of the energy quantization effects on SET inverter performance using noise margin modeling and monte carlo simulation”, International Conference on VLSI Design 2009, India.
16. Ratul Baruah and Santanu Mahapatra, “Concept of crossover point and its application on threshold voltage definition for undoped-body transistors”, International Conference On VLSI Design 2009, India.
17. Santanu Mahapatra, Ramesha A and Nayan Patel, “Tunnel FET: Nano-Scale Switch For Low Standby Power Applications”, International Conference on Nano and Microelectronics (ICONAME) 2008, Puducherry, India
18. Biswajit Ray and Santanu Mahapatra, “A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor”, International Conference on VLSI Design 2008, Hyderabad, India
19. Biswajit Ray and Santanu Mahapatra, “Analytical Potential Model for Omega Gate Cylindrical Nanowire Transistor”, International Conference on Nano and Microelectronics 2008, Puducherry, India
20. Nayan B Patel and Santanu Mahapatra, “Performance Enhancement of the Tunnel Field Effect Transistor using SiGe Source, International Workshop on Physics for Semi-conductor Devices 2007, Mumbai, India
21. Biswajit Ray, Shubhakar, and Santanu Mahapatra, “Necessity for quatum simulation for future technology nodes, International Workshop on Physics for Semi-conductor Devices 2007, Mumbai, India
22. Shubhakar, Biswajit Ray and Santanu Mahapatra, “Challenges Posed to the State of the Art Device Simulators in Nanoscale Regime”, VLSI Design And Test Symposium 2007, Kolkata, India
23. Shubhakar and Santanu Mahapatra, “Effects of material properties and device parameters on the performance of Silicon nanowire FET”, ANM-2007, International conference, IIT Bombay, India
24. Ashish Pal, Saptarshi Das, Biswajit Ray and Santanu Mahapatra, “A New Spice Simulator for Single Electron Transistor Based Integrated Circuits”, VLSI Design And Test Symposium 2007, Kolkata, India
25. Nayan B. Patel and Santanu Mahapatra, “A Simulation Based Study and Analysis of Double Gate Tunnel FET Performance for Low Stand-By Power Applications”, VLSI Design And Test Symposium 2007, Kolkata, India
26. Chaitanya Sathe and Santanu Mahapatra, “Modeling and Analysis of Noise Margin in SET Logic”, International Conference on VLSI Design 2007, Bangalore, India
27. Nayan B. Patel and Santanu Mahapatra, “Tunnel FET – A Novel Device with Sub-Threshold Swing less than 60 mV/decade for Future Low Stand-by Power Applications”, National Conference on VLSI and Communication Engineering 2007, Kottayam, India
28. Serge Ecoffey, Vincent Pott, Didier Bouvet, Marco Mazza,Santanu Mahapatra, Alexandre Schmid, Yusuf Leblebici, Michel J. Declercq, Adrian M. Ionescu, “Nano-Wires for Room Temperature Operated Hybrid CMOS-NANO Integrated Circuits”, International Solid State Circuits Conference (ISSCC), Vol. 1, pp. 260-263, 2005.
29. Adrian Mihai Ionescu, Vincent Pott, Serge Ecoffey, Santanu Mahapatra, Kirsten Moselund, Paolo Dainesi, Kathy Buchheit, Marco Mazza, “Emerging nanoelectronics: multi-functional nanowire”, Proc. of CAS 2004, vol. 1, pp. 3-8, October, Romania.
30. Serge Ecoffey, Vincent Pott, Santanu Mahapatra, Didier Bouvet, Pierre Fazan, Adrian Mihai Ionescu, “A Hybrid CMOS-SET co-fabrication Platform Using Nanograin Polysilicon Wires”, Micro and Engineering (MNE) 2004, September, Rotterdam, Nederland.
31. Santanu Mahapatra and Adrian Mihai Ionescu, “A novel single electron SRAM architecture”, Proc. of IEEE NANO 2004, August, Munich, Germany.
32. Santanu Mahapatra, Vincent Pott, Serge Ecoffey, Alexandre Schmid, Christoph Wasshuber, Kaustav Banerjee, Yusuf Leblebici, Michel Declercq, Joseph Tringe, Adrian Mihai Ionescu, “SETMOS: A Novel True Hybrid SET-CMOS High Current Coulomb Blockade Oscillation Cell for Future Nano-Scale Analog ICs”, IEEE International Electron Device Meeting (IEDM) 2003, December, pp. 703-706, Washington DC, USA.
33. Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian Mihai Ionescu, “A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits”, International Conference on Computer Aided Design (ICCAD) 2003, pp. 497-502, November, San Jose, USA.
34. Santanu Mahapatra, Vincent Pott, and Adrian Mihai Ionescu, “Few Electron Negative Differential Resistance (NDR) Devices”, International Semiconductor Conference (CAS) 2003, Vol.1, pp. 51-54, September, Sinaia, Romania.
35. Santanu Mahapatra, Vincent Pott, Adrian Mihai Ionescu, “SETMOS-A High Current Coulomb Blockade Oscillation Device”, European Solid-State Device Research Conference (ESSDERC) 2003, pp. 183-186, September, Estoril, Portugal.
36. Santanu Mahapatra, Adrian Ionescu, Kaustav Banerjee and Michel Declercq, “Modelling and analysis of power dissipation in Single Electron logic”, IEEE International Electron Device Meeting (IEDM) 2002, pp. 323-326, December, San Francisco, USA.
37. Santanu Mahapatra, Adrian Ionescu and Kaustav Banerjee, “Quasi-analytical modelling of drain current and conductances of single electron transistors with mib”, 32^nd European Solid-State Device Research Conference (ESSDERC) 2002, pp. 391-394, September, Florence, Italy.
38. Adrian Ionescu, Michel Declercq, Santanu Mahapatra, Kaustav Banerjee, and Jacques Gautier, “Few Electron Devices: Towards Hybrid CMOS-SET Integrated Circuits”, 39^th Design Automation Conference (DAC) 2002, pp. 88-93, June, New Orleans, Louisiana, USA.
39. Adrian Ionescu, Michel Declercq, Santanu Mahapatra and Kaustav Banerjee, “Teaching microelectronics in the silicon ICs showstopper zone: a course on Ultimate devices and circuits: towards quantum electronics”, 4^th European workshop on Microelectronics Education (EWME) 2002, May, Spain.
40. Santanu Mahapatra, Adrian Ionescu, Kaustav Banerjee and Michel Declercq, “A SET Quantizer Circuit aiming at Digital Communication System”, IEEE International Symposium on Circuits and Systems (ISCAS) 2002, pp. V860-V863, May, Scottsdale, Arizona.