{"id":37,"date":"2017-03-21T08:50:52","date_gmt":"2017-03-21T08:50:52","guid":{"rendered":"http:\/\/santanu.dese.iisc.ac.in\/?page_id=37"},"modified":"2026-03-05T09:29:27","modified_gmt":"2026-03-05T09:29:27","slug":"home","status":"publish","type":"page","link":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/","title":{"rendered":"Home"},"content":{"rendered":"<p>[et_pb_section fb_built=&#8221;1&#8243; admin_label=&#8221;section&#8221; module_id=&#8221;home&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text _builder_version=&#8221;3.27.4&#8243; text_font=&#8221;Vollkorn||||&#8221; text_font_size=&#8221;60&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<h1><em>Professor Santanu Mahapatra<\/em><\/h1>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row column_structure=&#8221;1_4,3_4&#8243; admin_label=&#8221;row&#8221; _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;1_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_image src=&#8221;http:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-content\/uploads\/sites\/9\/2021\/08\/SM2021.jpg&#8221; align=&#8221;center&#8221; align_tablet=&#8221;center&#8221; align_phone=&#8221;&#8221; align_last_edited=&#8221;on|desktop&#8221; _builder_version=&#8221;4.9.0&#8243; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; max_width=&#8221;200px&#8221; animation_style=&#8221;slide&#8221; animation_direction=&#8221;left&#8221; animation_duration=&#8221;500ms&#8221; animation_intensity_slide=&#8221;10%&#8221; z_index_tablet=&#8221;0&#8243; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221;]<\/p>\n<p>\n&nbsp;<\/p>\n<p>[\/et_pb_image][\/et_pb_column][et_pb_column type=&#8221;3_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; custom_padding=&#8221;|||-10px&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<p>\n&nbsp;<\/p>\n<p>Department of Electronic Systems Engineering (formerly CEDT)<br \/>Indian Institute of Science (IISc) Bangalore<br \/>Bangalore 560012<\/p>\n<p>Research Area :\u00a0Computational Nanoelectronics<br \/>Email : santanu@iisc.ac.in<br \/>Phone : +91 80 23600810 Ext 116 \/ +91 80 22933090<br \/>Fax : +91 80 23600808<\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Bio&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; text_orientation=&#8221;justified&#8221; z_index_tablet=&#8221;0&#8243; text_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; text_text_shadow_vertical_length_tablet=&#8221;0px&#8221; text_text_shadow_blur_strength_tablet=&#8221;1px&#8221; link_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; link_text_shadow_vertical_length_tablet=&#8221;0px&#8221; link_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ul_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ul_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ul_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ol_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ol_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ol_text_shadow_blur_strength_tablet=&#8221;1px&#8221; quote_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; quote_text_shadow_vertical_length_tablet=&#8221;0px&#8221; quote_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_2_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_2_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_2_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_3_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_3_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_3_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_4_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_4_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_4_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_5_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_5_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_5_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_6_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_6_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_6_text_shadow_blur_strength_tablet=&#8221;1px&#8221; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221;]<\/p>\n<p align=\"justify\"><span style=\"font-family: Arial;font-size: small\"> Santanu Mahapatra received his B.E. (Bachelor of Engineering) degree from Jadavpur University, Kolkata, in the field of Electronics and Telecommunication in 1999, M. Tech (Master of Technology) degree in the field of Electrical Engineering (specializing in Microelectronics) in 2001 from Indian Institute of Technology (IIT) Kanpur, and Ph.D. degree from Swiss Federal Institute of Technology Lausanne (EPFL) in 2005. For his Ph.D. dissertation he worked on the modeling of Single Electron Transistor (SET) and its co-simulation and co-design with CMOS. <\/span><\/p>\n<p align=\"justify\"><span style=\"font-family: Arial;font-size: small\"> He joined Department of Electronic Systems Engineering (formerly CEDT), at Indian Institute of Science (IISc), Bangalore, India, as an assistant professor in August 2005 and promoted to associate professor and then full professor rank in September 2010 and December 2015 respectively. He founded Nano Scale Device Research Laboratory in 2006, where his research team engaged in modeling of carrier transports in nano materials at circuit, device and atomistic level. His research interests include two dimensional channel transistors, energy efficient electronic switches and energy-storage\u00a0at nano-scale. He is the author of the book Hybrid CMOS Single Electron Transistor Device and Circuit Design. He received IBM Faculty award in 2007, Microsoft Research India Outstanding Faculty Award in 2007 and the associateship of Indian Academy of Sciences in 2009. He is also the recipient of Ramanna Fellowship (2012 to 2015) in the discipline of electrical sciences from Department of Science and Technology, Government of India for his contribution in compact modeling. <\/span><\/p>\n<p align=\"justify\"><span style=\"font-family: Arial;font-size: small\"><u><span style=\"color: #008080;font-family: Arial;font-size: large\"><a href=\"http:\/\/scholar.google.com\/citations?user=PD9uz2QAAAAJ&amp;hl=en\" target=\"_blank\" rel=\"noopener noreferrer\">Link to Google Scholar<\/a><\/span><\/u><\/span><\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section][et_pb_section fb_built=&#8221;1&#8243; module_id=&#8221;teaching&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Course&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; text_orientation=&#8221;justified&#8221; z_index_tablet=&#8221;0&#8243; text_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; text_text_shadow_vertical_length_tablet=&#8221;0px&#8221; text_text_shadow_blur_strength_tablet=&#8221;1px&#8221; link_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; link_text_shadow_vertical_length_tablet=&#8221;0px&#8221; link_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ul_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ul_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ul_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ol_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ol_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ol_text_shadow_blur_strength_tablet=&#8221;1px&#8221; quote_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; quote_text_shadow_vertical_length_tablet=&#8221;0px&#8221; quote_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_2_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_2_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_2_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_3_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_3_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_3_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_4_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_4_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_4_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_5_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_5_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_5_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_6_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_6_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_6_text_shadow_blur_strength_tablet=&#8221;1px&#8221; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221;]<\/p>\n<h3><u><b><span style=\"color: #008080;font-family: Arial;font-size: large\">Courses Offered:<\/span><\/b><\/u><\/h3>\n<ul>\n<li>E3 226 (Earlier 225) &#8211; Art of Compact Modeling (August Term)<br \/>Syllabus: Band theory of solids, carrier transport mechanism, P-N junction diode, MOS Capacitor Theory, C-V characteristics, MOSFET operation, Types of compact models, Input Voltage Equation, Charge Linearization, Charge Modeling, Concept of Core Model, Quasi-static and Non-quasi-static Model, Introduction to Verilog-A, Brief overview of EKV and PSP<\/li>\n<li>E3 268 &#8211; Advanced CMOS and beyond CMOS (January Term)<br \/>Syllabus: ITRS, Problems with short channel devices: SCE, DIBL, leakage, Breakthrough Solutions: SOI, High K, metal gate, Non-classical MOSFET, CMOS scaling limit, Emerging nanotechnologies: SET, QCA, RSQF, RTD.<\/li>\n<\/ul>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section][et_pb_section fb_built=&#8221;1&#8243; module_id=&#8221;Research&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Projects&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; text_orientation=&#8221;justified&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<h3><u><b><span style=\"color: #008080;font-family: Arial;font-size: large\">Sponsored Research Projects:<\/span><\/b><\/u><\/h3>\n<ul>\n<li>Principal Investigator of the project &#8220;Multi-Scale Modeling of 2D Non-Volatile Resistive Memory&#8221;, funded by ISRO Space Technology Cell, \u00a02025-2027.<\/li>\n<li>Principal Investigator of the project &#8220;Exploration of novel spintronic devices based on two-dimensional magnets&#8221;, funded by SERB-DST, \u00a02021-2023.<\/li>\n<li>Principal Investigator of the project &#8220;Exascale Reactive Molecular Dynamics Based Investigation of Resistive Switching in Two-Dimensional Materials&#8221;, funded by National Supercomputing Mission (NSM), 2021-2023.<\/li>\n<li>Principal Investigator of the project &#8220;Computational screening of 2D materials for applications in integrated circuits&#8221;, funded by MATRICS-SERB, 2020-2023.<\/li>\n<li>Principal Investigator of the project &#8220;2D Material Informatics for lithium ion storage&#8221;, funded by Technology Mission Division Energy &amp; Water DST, 2019-2022.<\/li>\n<li>BRICS STI Cooperation:\u00a0Electronic synapses based on two dimensional materials for neuromorphic computing, 2019-2022.<\/li>\n<li>Indo-Austria Mobility Grant with TU-Wein, June 2018-May 2020.<\/li>\n<li>Principal Investigator of the project &#8220;Quantum transport equation based next-generation compact model&#8221;, funded by CSIR, Duration: May\u00a02018 to April\u00a02021.<\/li>\n<li>Principal Investigator of the project &#8220;First principles based exploration of atomically thin layered material for next generation Li ion battery&#8221;, funded by ISRO-IISC Space Technology Cell, Duration: April 2017 to March 2020.<\/li>\n<li>Principal Investigator of the project &#8220;Understanding electron and phonon transport in hetero atomic layer transistors&#8221;, funded by SERB-DST, Duration: Dec 2015 to Dec 2018.<\/li>\n<li>Principal Investigator of the project &#8220;Performance evaluation of (MOS)2FET through novel device simulator development&#8221;, funded by SERB-DST, Duration: Dec 2012 to Nov 2015.<\/li>\n<li>&#8220;Professional Compact Models for Next Generation Multiple-Gate MOS Transistors&#8221;, funded by Department of Science and Technology (DST) under Ramanna Fellowship scheme (duration: 2012 to 2015).<\/li>\n<li>Principal Investigator of the project &#8220;Ab initio analytical study of the effect of strain on silicon&#8221; funded by ISRO-IISC Space Technology Cell, (duration: 2010 to 2013)<\/li>\n<li>Principal Investigator of the project &#8220;Compact modeling of asymmetric double gate nano scale transistors&#8221; funded by IFCPAR (Indo French Centre for the Promotion of Advanced Research) jointly with ISEP-Paris (duration: 2010 to 2013).<\/li>\n<li>Co-Investigator of the project &#8220;Compact modeling of Carbon Nanotube transistors and their interconnects&#8221;, funded by Department of Science and Technology (DST) under Fasttrack scheme, India (duration: 2009 to 2012).<\/li>\n<li>Principal Investigator of the project, &#8220;Computationally Efficient Analytical Solution of Non-Linear Poisson Equation for Compact Modeling of Nano-Scale Multi-Gate Transistors&#8221;, funded by Department of Science and Technology (DST), India (duration: 2009 to 2012)<\/li>\n<li>Principal Investigator of the project, &#8220;Single Electronics: Towards Hybrid CMOS-SET circuit design&#8221;, funded by Council of Scientific and Industrial Research (CSIR), India (duration: 2007 to 2010)<\/li>\n<li>Principal Investigator of the project, &#8220;Device reliability modeling and simulation for sub 65nm technology nodes&#8221;, funded by IBM India Pvt Ltd. (duration: 2007 to 2010)<\/li>\n<li>Principal Investigator of the project \u201cCompact Modeling and Simulation of Silicon Nanowire \u201c funded by Department of Science and Technology (DST) under Fasttrack scheme, India (duration: 2006 to 2009)<\/li>\n<\/ul>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section][et_pb_section fb_built=&#8221;1&#8243; module_id=&#8221;Students&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Student&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; z_index_tablet=&#8221;0&#8243; text_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; text_text_shadow_vertical_length_tablet=&#8221;0px&#8221; text_text_shadow_blur_strength_tablet=&#8221;1px&#8221; link_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; link_text_shadow_vertical_length_tablet=&#8221;0px&#8221; link_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ul_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ul_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ul_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ol_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ol_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ol_text_shadow_blur_strength_tablet=&#8221;1px&#8221; quote_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; quote_text_shadow_vertical_length_tablet=&#8221;0px&#8221; quote_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_2_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_2_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_2_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_3_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_3_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_3_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_4_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_4_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_4_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_5_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_5_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_5_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_6_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_6_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_6_text_shadow_blur_strength_tablet=&#8221;1px&#8221; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221;]<\/p>\n<p><u><b><span style=\"color: #008080;font-family: Arial;font-size: large\">Students and Associates:<\/span><\/b><\/u><\/p>\n<table border=\"1\" width=\"897\" cellpadding=\"3\">\n<tbody>\n<tr>\n<td bgcolor=\"#E3E3C7\" width=\"247\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Name<\/b><\/span><\/div>\n<\/td>\n<td bgcolor=\"#E3E3C7\" width=\"200\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Program<\/b><\/span><\/div>\n<\/td>\n<td bgcolor=\"#E3E3C7\" width=\"450\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Research Topic<\/b><\/span><\/div>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Amal Kishore<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">\u00a0Post-Doctoral Fellow<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">2D Ferroelectric<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Arkavo Hait<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. (4th Year)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Computational Physics<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Sourav Guha<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. (2nd Year)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Device modeling<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Debraj Banerjee (Jointly with Prof. Kunal N Chaudhury)<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. (1st Year)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Ising Model<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><u><b><span style=\"color: #000066;font-family: Arial;font-size: medium\">Alumni<\/span><\/b><\/u><\/p>\n<table border=\"1\" width=\"100%\" cellpadding=\"4\">\n<tbody>\n<tr>\n<td bgcolor=\"#E3E3C7\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Name<\/b><\/span><\/div>\n<\/td>\n<td bgcolor=\"#E3E3C7\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Program (Year of Pass out)<\/b><\/span><\/div>\n<\/td>\n<td bgcolor=\"#E3E3C7\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Research\/Thesis Topic<\/b><\/span><\/div>\n<\/td>\n<td bgcolor=\"#E3E3C7\">\n<div align=\"center\"><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Current Status<\/b><\/span><\/div>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Akhilesh Rawat<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">NPDF (March 2024 to Nov 2024)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">2D Ferroelectric devices<\/span><\/td>\n<td>Synopsys Hyderabad<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Sanchali Mitra<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">IoE Post Doc (Sept 2019 to Sep 2023)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">2D Resistive Memory<\/span><\/td>\n<td>SUTD<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Shreeja Das<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Post Doc (April 2021 to Sep 2022)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">2D Magnetic Tunnel Junction<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Shell India<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Pujarini Ghosh Mukherjee<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>DS Kothari Post Doctoral fellowship 2014<\/b><\/span><b> <\/b><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Post Doc (June 2013 to Aug 2014)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">Graphene thermoelectric<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">&#8212;<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Amretashis Sengupta<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>DST Inspire Faculty Award 2013<\/b><\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Hanse-Wissenschaftskolleg fellowship 2016-17<\/b><\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>DST Nano Science and Technology Post Doctoral fellowship 2012<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Post Doc: (April 2012-March 2014)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">2D channel material MOSFET<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">&#8212;<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Sitangshu Bhattacharya<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>DST Inspire Faculty Award 2012<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Post Doc (2008-2013)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">Carbon nanomaterials<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Assistant Professor, IIIT-Allahabad<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dr. Arkaprava Bhattacharya<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Post-Doc (Feb-March 2013)<\/span><\/div>\n<\/td>\n<td align=\"left\"><span style=\"font-family: Arial;font-size: small\">Compact Modeling<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Assistant Professor, SASTRA University<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Sirsha Guha<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><br \/><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2025)<\/span><\/div>\n<\/td>\n<td>GPU-accelerated quantum transport solver to explore 2D material space for transistor operation<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Global Foundry, Bangalore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Vaishnavi \u00a0Vishnubhotla<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><br \/><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2024)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">First-principles based investigation of the adsorption and optoelectronic properties of polymorphic borophene<\/span><\/td>\n<td>\u00a0<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><br \/><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2022)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">High-Throughput Computational Techniques for Discovery of Application-Specific Two-Dimensional Materials<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">A-Star, Singapore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Biswapriyo Das<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><br \/><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2021)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Atom-to-Circuit modeling strategy for 2D transistors<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Global Foundry, Bangalore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Madhuchhanda Brahma<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Raman-Charpak Fellowship 2016<\/b><br \/><b>Nature Research Early Career Travel Grant 2018<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2019)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Multiscale modeling of quantum transport in 2D material based MOS transistors<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Gobal Foundry, USA (Post Doc UT Dallas)<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Ananda Shankar Chakraborty<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. \u00a0(2019)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Quantum-Drift-Diffusion Formalism Based Compact Model For Low Effective Mass Channel MOSFET<\/span><\/td>\n<td>\n<p>Mathworks, Bangalore<\/p>\n<p><span style=\"font-family: Arial;font-size: small\">(Post Doc UC Berkeley)<\/span><\/p>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Dipankar Saha<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Finalist Falling Walls Lab India 2017<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2017)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Atomistic study of carrier transmission in hetero-phase MoS2 structures<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Faculty IIEST<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Anuja Chanana<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Sarukkai Jagannathan Award 2015<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2016)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">First principles study of 2D material metal contact<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\"> Post Doc at JNCASR<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Neha Sharan<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Best paper award IEEE CONECCT 2015<\/b><\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Sarukkai Jagannathan Award 2014<\/b><\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>CEFIPRA fellowship 2013<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2014)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Compact modeling of short channel common double gate MOSFET adapted to gate-oxide thickness asymmetry<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Nexperia, UK<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Rekha Verma<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>TechnoInventor Award 2014<\/b><\/span> <span style=\"font-family: Arial;font-size: small\">from India Electronics and Semiconductor Association<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Investigation of electro-thermal and thermoelectric properties of carbon nano materials<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Assistant Professor, IIIT-Allahabad<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Ramakrishna Ghosh<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Tag Corporation Medal 2015<\/b><\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>DST Inspire Faculty Award 2017<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Exploration of real and complex dispersion relationship of nanomaterials for next generation transistor applications<\/span><\/td>\n<td>\n<p><span style=\"font-family: Arial;font-size: small\">Assistant Professor IIIT-D<\/span><\/p>\n<p><i>Post Doc:<\/i>\u00a0Notre-Dame, Penn-State<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Jandhyala Srivatsava<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Tag corporation medal 2013<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Compact Modeling of Independent\/Asymmetric Double Gate MOSFETs<\/span><\/td>\n<td>\n<p><span style=\"font-family: Arial;font-size: small\"> Intel, India<\/span><\/p>\n<p><i>Post Doc:<\/i> UC Berkeley<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Pankaj Kumar Thakur<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Poisson&#8217;s Solution and Large-Signal Modeling for Independent Double Gate MOSFET<\/span><\/td>\n<td>\n<p><span style=\"font-family: Arial;font-size: small\">Ex-Assistant Professor, IIT Ropar<\/span><\/p>\n<p><i>Post Doc:<\/i> UC Berkeley<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Radhamanjari Samanta (Jointly with Prof. S. Raha, Under interdisciplinary nanoscience and nanotechnology program)<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D.(2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Timing-Driven Routing in VLSI Physical Design under Uncertainty<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">AMD Bangalore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Surya Shankar Dan<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Tag Corporation Medal 2011<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">Ph.D. (2009)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Impact of energy quantization on Single Electron Transistor devices and circuits<\/span><\/td>\n<td>\n<p><span style=\"font-family: Arial;font-size: small\">Ex-Assistant Professor, IIT Khargpur<\/span><\/p>\n<p><i>Post Doc:<\/i> EPFL<\/p>\n<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Richa Chakravarty<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro(2016)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">First principles study on phase engineered MoS2-metal top contact<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">ISRO<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Chethan Kumar<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Best paper award IEEE CONECCT 2015<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2015)<\/span><\/div>\n<div align=\"center\">MSc. Engg. (2018)<\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Topics in compact modeling<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Intel Bangalore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Ved Prakash<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2014)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Topics in compact modeling<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">IRISET<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Mani Kanta<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2013)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Topics in compact modeling<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Texas Instruments India<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Abby Abraham<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Alumni Medal 2013<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2012)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Compact Modeling Aspects of Independent Double Gate MOSFET<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">IRISET<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Prabhat Ranjan<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2010)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Mixedmode Simulation of IDGMOS<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Tejas Network<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Sudipta Sarkar<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Best M.Tech Thesis Award under SMDP-II (2009-10)<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2010)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Non Quasi Static Modeling of Multi-Gate MOSFETs<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Pursuing Ph.D. at UT Dallas<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Sivakumar Bondada<br \/>(Jointly with Dr. S.Raha)<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2008)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Interconnect Modeling for Process Variability<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">NVIDIA<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Chaitanya Sathe<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2007)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Modeling and Analysis of Noise Margin in SET Logic<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Pursuing Ph.D. at University of Illinois at Urbana Champagne<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Shubhakar K.<br \/>(QIP Candidate)<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2007)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Simulation study of Carrier Transport in Silicon Nanowire Field Effect Transistor using Non-Equilibrium Green\u2019s Function(NEGF) Approach<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Pursuing Ph.D. at National University of Singapore<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Mastan Rao Kongara<br \/>(Jointly with TI)<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.E. Micro (2006)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Testing for Parametric Faults in Analog Circuits Using Oscillation based Test Methodology<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">BEL<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Sanjana Raman<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Tech. Res. (2025)<\/span><\/div>\n<\/td>\n<td>Physics-informed neural network-based solution for the Poisson-Boltzmann \u00a0equation in an independent double-gate MOSFET<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">&#8212;<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Mayank kumar<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Tech. Res. (2023)<\/span><\/div>\n<\/td>\n<td>\n<div>\n<p>First principles-based study of monolayer WSSe and metal interface<\/p>\n<\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">&#8212;<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Tripti Jain<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Tech. Res. (2022)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Classifying magnetic and non-magnetic two-dimensional materials by machine learning<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Nvidia<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Om Kesharwani<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Tech. Res. (2021)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">First-Principles based study of graphene inserted tellurene-metal interface<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Aura Semiconductor<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">A Rex<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg. (2011)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Thermal Conductivity Modeling for metallic Single Walled Carbon Nanotube<\/span><\/td>\n<td>\u00a0<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Rakesh P<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg. (2009)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Analytical Modeling of Quantum Threshold Voltage for Short Channel Multi Gate Silicon Nanowire Transistors<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Pursuing PhD at university of Minnesota<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Avinash Sahoo<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>Tag Corporation Medal 2010<\/b><\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg.(2009)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">On the modeling of inversion charge in Multi Gate FinFET<\/span><\/td>\n<td>\u00a0<\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Biswajit Ray<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>TechnoInventor Award 09<\/b><\/span> <span style=\"font-family: Arial;font-size: small\">from India Semiconductor Association<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg. (2008)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Impact of Body Center Potential on the Electrostatics of Undoped Body Multi Gate Transistors: A Modeling Perspective<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Sandisk, USA Ph.D. : Purdue University<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Ramesha A<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg. (2008)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Sub-threshold Slope Modeling &amp; Gate Alignment Issues in Tunnel Field Effect Transistor<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">DRDO<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-family: Arial;font-size: small\">Nayan Patel<\/span><br \/><span style=\"color: #000066;font-family: Arial;font-size: small\"><b>TechnoInventor Award 08<\/b><\/span> <span style=\"font-family: Arial;font-size: small\">from India Semiconductor Association<\/span><\/td>\n<td>\n<div align=\"center\"><span style=\"font-family: Arial;font-size: small\">M.Sc. Engg. (2007)<\/span><\/div>\n<\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Performance Enhancement of the Tunnel Field Effect Transistor for Future Low Stand-by Power Applications<\/span><\/td>\n<td><span style=\"font-family: Arial;font-size: small\">Cypress Semiconductor<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>&nbsp;<\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section][et_pb_section fb_built=&#8221;1&#8243; module_id=&#8221;pub&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Publications &#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<p>\n<u><b><span style=\"color: #008080;font-family: Arial;font-size: large\">Publications:<\/span><\/b><\/u><\/p>\n<h3><span style=\"color: #000066;font-family: Arial;font-size: medium\">Books<\/span><\/h3>\n<ul>\n<li>\u201cHybrid CMOS Single Electron Transistor Device and Circuit Design\u201d, Santanu Mahapatra and Adrian M. Ionescu, Artech House Publication ISBN 1-59693-069-1, 2006.<\/li>\n<li>Chapter in \u201cEmerging Nanoelectronics: Life With and After CMOS\u201d by Adrian M. Ionescu and Kaustav Banerjee, Editors, Kluwer Academic Publishers, ISBN: 1-4020-75332, 2004.<\/li>\n<\/ul>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Journal&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; text_orientation=&#8221;justified&#8221; hover_enabled=&#8221;0&#8243; z_index_tablet=&#8221;0&#8243; text_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; text_text_shadow_vertical_length_tablet=&#8221;0px&#8221; text_text_shadow_blur_strength_tablet=&#8221;1px&#8221; link_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; link_text_shadow_vertical_length_tablet=&#8221;0px&#8221; link_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ul_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ul_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ul_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ol_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ol_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ol_text_shadow_blur_strength_tablet=&#8221;1px&#8221; quote_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; quote_text_shadow_vertical_length_tablet=&#8221;0px&#8221; quote_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_2_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_2_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_2_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_3_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_3_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_3_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_4_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_4_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_4_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_5_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_5_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_5_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_6_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_6_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_6_text_shadow_blur_strength_tablet=&#8221;1px&#8221; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221; sticky_enabled=&#8221;0&#8243;]<\/p>\n<h3><span style=\"color: #000066;font-family: Arial;font-size: medium\">Journal Publications<\/span><\/h3>\n<ol>\n<li><span style=\"font-family: Arial;font-size: small\">Sourav Guha, Padmapriya K and Santanu Mahapatra, \u201cDigital discovery of distorted-P1 molybdenum ditelluride and its significance in resistive switching\u201d. Journal of <i>Applied Physics,<\/i> Vol. 139, pp. 094303, 2026.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arkavo Hait and Santanu Mahapatra, &#8220;CUDA-METRO: Parallel Metropolis Monte Carlo for 2D Atomistic Spin Texture Simulation, <em>Journal of Open Source Software<\/em> (JOSS), Vol 10, pp. 7589, 2025.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sirsha Guha, Sitangshu Bhattacharya and Santanu Mahapatra, \u201cExceptional Ballisticity in Monolayer BX (X= P, As, Sb) Transistors\u201d. Journal of <i>Applied Physics,<\/i> Vol. 137, pp. 094302, 2025.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sanchali Mitra, and Santanu Mahapatra, &#8220;Atomistic description of conductive bridge formation in two-dimensional material based memristor&#8221;, <span style=\"font-family: Arial;font-size: small\"><em>npj 2D Materials and Applications<\/em>, Nature portfolio, 2024. [<strong><span style=\"color: #ff00ff\"><a style=\"color: #ff00ff\" href=\"https:\/\/www.nature.com\/collections\/ejibacfeab\">Nature Collection: Neuromorphic Computing Devices<\/a><\/span><\/strong>]\u00a0<\/span><\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Vaishnavi Vishnubhotla, Santanu Mahapatra, and Sitangshu Bhattacharya, &#8220;Excitonic properties of clustered-P1 borophene&#8221;, <em>Physical Review B<\/em>, Vol. 108, pp. 245107, 2023.\u00a0<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Tejas Govind Indani, Kunal Narayan Chaudhury, Sirsha Guha and Santanu Mahapatra, &#8220;Physically constrained learning of MOS capacitor electrostatics&#8221;, <em>Journal of Applied Physics<\/em>, Vol. 134, pp. 184903, 2023. [<strong><a href=\"https:\/\/techxplore.com\/news\/2023-11-machines-metal-oxide-semiconductor-capacitors.html\">TechXplore<\/a><\/strong>].<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj and Santanu Mahapatra, &#8220;Realizing unipolar and bipolar intrinsic skyrmions in MXenes from high-fidelity first-principles calculations&#8221;, <em>npj Computational Materials<\/em>, Nature portfolio, Vol. 9, pp. 173, 2023.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Vaishnavi Vishnubhotla, Sanchali Mitra, and Santanu Mahapatra, &#8220;First-principles based study of 8-Pmmn Borophene and metal interface,\u201d <em>Journal of Applied Physics<\/em>, Vol. 134, pp. 034301, 2023.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sirsha Guha, Arnab Kabiraj and Santanu Mahapatra, \u201cDiscovery of clustered-P1 borophene and its application as the lightest high-performance transistor\u201d. <i>ACS Applied Materials &amp; Interfaces,<\/i>\u00a0Vol. 15, pp. 3182, 2023. [<strong><a href=\"https:\/\/phys.org\/news\/2023-01-semiconducting-borophene-paves-lightest-high-performance.html\">Science X Dialog<\/a><\/strong>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sanchali Mitra and Santanu Mahapatra, &#8220;Insights to nonvolatile resistive switching in monolayer hexagonal boron nitride&#8221;, <em>Journal of Applied Physics<\/em>, Vol. 132, pp. 224302, 2022<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj, Tripti Jain and Santanu Mahapatra, &#8220;Massive Monte Carlo simulations-guided interpretable learning of two-dimensional Curie temperature&#8221;, <em>Patterns<\/em>, Cell Press, Vol. 3, pp. 100625, 2022. [<a href=\"http:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-content\/uploads\/sites\/9\/2022\/12\/coverpage.jpg\"><span style=\"color: #ff0000\"><strong>Cover Page December Issue<\/strong><\/span><\/a>][<a href=\"https:\/\/www.nanowerk.com\/spotlight\/spotid=62003.php\"><strong>Nanowerk Spotlights<\/strong><\/a>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sanchali Mitra and Santanu Mahapatra, &#8220;Schottky-Mott limit in graphene inserted 2D semiconductor-metal interfaces&#8221;, <em>Journal of Applied Physics<\/em>, Vol. 132, pp. 145301, 2022.\u00a0<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sirsha Guha, Arnab Kabiraj and Santanu Mahapatra, \u201cHigh-throughput design of functional-engineered MXene transistors with low-resistive contacts\u201d. <em>npj Computational Materials<\/em>, <span style=\"font-family: Arial;font-size: small\">Nature portfolio, <\/span>Vol. 8, pp. 202, 2022.[<strong><a href=\"https:\/\/www.nanowerk.com\/spotlight\/spotid=61538.php\">Nanowerk Spotlights<\/a><\/strong>][<strong><a href=\"https:\/\/www.nature.com\/articles\/d44151-022-00118-1\">Research Highlights in Nature India<\/a><\/strong>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Shreeja Das, Arnab Kabiraj \u00a0and Santanu Mahapatra, &#8220;Room temperature giant magnetoresistance in half-metallic Cr2C based two-dimensional tunnel junctions&#8221;, <em>Nanoscale<\/em>, 2022.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Vaishnavi Vishnubhotla, Arnab Kabiraj, Aninda J Bhattacharyya, and Santanu Mahapatra, &#8220;Global Minima Search for Sodium and Magnesium Adsorbed Polymorphic Borophene&#8221;, <em>The Journal of Physical Chemistry C<\/em>, 2022.<\/span><\/li>\n<li>A<span style=\"font-family: Arial;font-size: small\">rnab Kabiraj and Santanu Mahapatra, &#8220;High-throughput assessment of two-dimensional electrode materials for energy storage devices&#8221;, <em>Cell Reports Physical Science<\/em>, Vol. 3, pp. 100718, 2022.[<strong><a href=\"https:\/\/www.nanowerk.com\/spotlight\/spotid=59538.php\">Nanowerk Spotlights<\/a><\/strong>][<strong><a href=\"https:\/\/www.nature.com\/articles\/d44151-022-00002-y\">Research Highlights in Nature India<\/a><\/strong>][<strong><a href=\"https:\/\/timesofindia.indiatimes.com\/city\/bengaluru\/new-framework-to-check-energy-storage-in-2d-materials\/articleshow\/88983411.cms#_ga=2.160980093.155585939.1642882993-amp-7L14xHVp-Tr-2B15sKSX0jJK2rFxAjN4OnGEVoWUNnDG3BPuTW-Ay9Rd3s2Uj1w2\">Times of India<\/a><\/strong>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sanchali Mitra, Om Kesharwani and Santanu Mahapatra, &#8220;Ohmic to Schottky conversion in monolayer tellurene-metal interface via graphene insertion&#8221;, <em>The Journal of Physical Chemistry C<\/em>, Vol. 125, pp. 12975-12982, 2021.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sanchali Mitra, Arnab Kabiraj and Santanu Mahapatra, &#8220;Theory of nonvolatile resistive switching in monolayer molybdenum disulfide with passive electrodes&#8221;, <span style=\"font-family: Arial;font-size: small\"><em>npj 2D Materials and Applications<\/em>, Nature portfolio, 2021. [ First and second authors made equal contributions]. [<strong><a href=\"https:\/\/www.nanowerk.com\/spotlight\/spotid=57602.php\">Nanowerk Spotlights<\/a><\/strong>][<strong><a href=\"https:\/\/sciencex.com\/news\/2021-04-reactive-molecular-dynamics-reveals-fundamental.html\">Science X Dialog<\/a><\/strong>][<strong><a href=\"https:\/\/www.natureasia.com\/en\/nindia\/article\/10.1038\/nindia.2021.77\">Research Highlights in Nature India<\/a><\/strong>][<strong><span style=\"color: #ff00ff\"><a style=\"color: #ff00ff\" href=\"https:\/\/www.nature.com\/collections\/ejibacfeab\">Nature Collection: Neuromorphic Computing Devices<\/a><\/span><\/strong>]\u00a0<\/span><\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj, Aninda J Bhattacharyya, and Santanu Mahapatra, &#8220;Thermodynamic insights into polymorphism-driven lithium-ion storage in monoelemental 2D materials&#8221;, \u00a0<em>The<\/em>\u00a0<em>Journal of Physical Chemistry Letters,<\/em>\u00a0 Vol. 12, pp. 1220, 2021.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswapriyo Das \u00a0and Santanu Mahapatra, &#8220;A predictive model for high-frequency operation of two-dimensional transistors from first-principles&#8221;, <i>Journal of Applied Physics<\/i>, Vol. 128, pp. 234502, 2020.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj and Santanu Mahapatra, &#8220;Machine Intelligence Driven High-Throughput Prediction of 2D Charge Density Wave Phases&#8221;, <em>The<\/em>\u00a0<em>Journal of Physical Chemistry Letters,<\/em> Vo. 11, pp. 6291, 2020. [<strong><a href=\"https:\/\/www.nanowerk.com\/spotlight\/spotid=55842.php\">Nanowerk Spotlights<\/a><\/strong>][<strong><a href=\"https:\/\/sciencex.com\/news\/2020-08-machine-intelligence-two-dimensional-density-materials.html\">Science X Dialog<\/a><\/strong>][<span style=\"color: #ff00ff\"><strong><a style=\"color: #ff00ff\" href=\"https:\/\/urldefense.com\/v3\/__https:\/pubs.acs.org\/page\/vi\/machine-learning__;!!LIr3w8kk_Xxm!5XJnxvbvfn09o1FQjeMEqPp0aO4UIyNnoa9ptXKpqzUqh-aenFWTTXajaBbbstk$\">Virtual Issue: Machine Learning in Physical Chemistry<\/a><\/strong><\/span>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswapriyo Das, Diptiman Sen \u00a0and Santanu Mahapatra, &#8220;Tuneable quantum spin Hall states in confined 1T&#8217; \u00a0transition metal dichalcogenides&#8221;, <em>Scientific Reports,<\/em> Nature portfolio, 2020. [<a href=\"https:\/\/www.nature.com\/collections\/ihggebhehd\"><span style=\"color: #ff00ff\"><strong>Nature collection: Top 100 in Physics<\/strong><\/span><\/a>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj, Mayank Kumar \u00a0and Santanu Mahapatra, &#8220;High-throughput discovery of high Curie point two-dimensional ferromagnetic materials&#8221;,\u00a0<em>npj Computational Materials,<\/em> Nature portfolio, 2020. [<strong><a href=\"https:\/\/phys.org\/news\/2020-04-high-throughput-discovery-d-magnets.html\">News in Phys.org<\/a><\/strong>][<strong><a href=\"https:\/\/www.natureasia.com\/en\/nindia\/article\/10.1038\/nindia.2020.89\">Research Highlights in Nature India<\/a><\/strong>] [<strong><a href=\"http:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-content\/uploads\/sites\/9\/2020\/07\/SR-578-38-40-Leveraging-Spintronics-Aug20.pdf\">Featured in Science Reporter<\/a><\/strong>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj and Santanu Mahapatra, &#8220;Intercalation driven reversible switching of 2D magnetism&#8221;, <em>The\u00a0Journal of Physical Chemistry C,<\/em> Vol. 124, No. 1146-1157, 2020.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Madhuchhanda Brahma, Arnab Kabiraj, Marc Bescond and Santanu Mahapatra, \u201cPhonon limited anisotropic quantum transport in phosphorene field effect transistors\u201d <em>\u00a0Journal of Applied Physics<\/em>, Vol. 126, No. 114502, 2019. [<span style=\"color: #ff00ff\"><strong>Editor&#8217;s Pick<\/strong><\/span>] [<strong><a href=\"https:\/\/vigyanprasar.gov.in\/isw\/Software-tool-to-help-make-better-nanoscale-semiconductors.html\">Featured in Vigyan Prasar<\/a><\/strong>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sahil Garg, Bipan Kaushal, Sanjeev Kumar, S.R Kasjoo, Santanu Mahapatra and Arun K. Singh, \u201cExtraction of trench capacitance and reverse recovery time of InGaAs self-switching diode\u201d \u00a0<em>IEEE Transactions on Nanotechnology<\/em>, Vo. 18, pp. 925, 2019.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arnab Kabiraj and Santanu Mahapatra, \u201cHigh-throughput first-principles-calculations based estimation of lithium ion storage in monolayer rhenium disulfide\u201d \u00a0<em>Communications Chemistry<\/em>, Nature portfolio, 2018. [<span style=\"color: #ff00ff\"><a style=\"color: #ff00ff\" href=\"https:\/\/www.nature.com\/collections\/faagahedhh\"><strong>Nature collection: Nobel Prize in Chemistry 2019<\/strong><\/a><\/span>][<span style=\"color: #ff00ff\"><strong><a style=\"color: #ff00ff\" href=\"https:\/\/www.nature.com\/collections\/behjhfjbhh\">Nature collection: Energy Storage and Conversion<\/a><\/strong><\/span>][<span style=\"color: #ff00ff\"><a style=\"color: #ff00ff\" href=\"https:\/\/www.nature.com\/collections\/jaeijcfdeh\"><strong>Nature collection: Chemistry in 2D<\/strong><\/a><\/span>]<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswapriyo Das and Santanu Mahapatra, \u201cAn Atom-to-Circuit modeling approach to all-2D Metal-Insulator Semiconductor Field-Effect Transistors\u201d\u00a0<em>npj 2D Materials and Applications<\/em>, Nature portfolio,Vol.2, No.28, 2018.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Madhuchhanda Brahma, Arnab Kabiraj, Dipankar Saha\u00a0and Santanu Mahapatra, \u201cScalability assessment of Group-IV mono-chalcogenide based tunnel FET\u201d <em>\u00a0Scientific Reports,\u00a0<\/em> Nature portfolio, 2018.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Ananda Sankar Chakraborty and Santanu Mahapatra, &#8220;Compact Model for Low Effective Mass Channel Common Double-Gate MOSFET,\u201d \u00a0<i>IEEE Transactions on Electron Devices<\/i>, Vol. 65, No.3, pp. 888-894, 2018.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Madhuchhanda Brahma, Marc Bescond, Demetrio Logoteta, Ram Krishna Ghosh and Santanu Mahapatra, \u201c Germanane MOSFET for sub-Deca Nanometer High Performance Technology Nodes\u201d\u00a0<em>IEEE Transactions on Electron Devices,\u00a0<\/em>Vol. 65, No.3, pp. 1198-1204, \u00a02018.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Arup Paul , Manabendra Kuiri , Dipankar Saha, Biswanath Chakraborty , Santanu Mahapatra, A.K. Sood and Anindya Das, &#8220;Photo-tunable Transfer Characteristics in MoTe2-MoS2 Vertical Hetero-structure&#8221; \u00a0<\/span><span style=\"font-family: Arial;font-size: small\"><i>npj<\/i><\/span><i style=\"font-family: Arial;font-size: small\">\u00a02D Materials and Applications<\/i><span style=\"font-family: Arial;font-size: small\">, Nature portfolio journal, Vol.1, \u00a02017.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Dipankar Saha and Santanu Mahapatra, &#8220;Anisotropic transport in 1T&#8217; monolayer MoS2 and its metal interfaces&#8221; <em>RSC Physical Chemistry Chemical Physics<\/em>, Vol. 19, pp. 10453, 2017.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Dipankar Saha and Santanu Mahapatra, &#8220;Asymmetric Junctions in Metallic-Semiconducting-Metallic Heterophase MoS2,&#8221; \u00a0<i>IEEE Transactions on Electron Devices<\/i>, Vol. 64, No. 5, pp. 2457-2460, 2017. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ananda Sankar Chakraborty and Santanu Mahapatra, &#8220;Surface Potential Equation for Low Effective Mass Channel Common Double-Gate MOSFET,\u201d \u00a0<i>IEEE Transactions on Electron Devices<\/i>, Vol.64, No.4, pp. 1519-1527, 2017. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Adam Makosiej, Navneet Gupta, Naga Vakul, Andrei Vladimirescu, Sorin Cotofana, Santanu Mahapatra, Amara Amara, and Costin Anghel, &#8220;Ultra-Low Leakage SRAM Design with sub-32nm Tunnel FETs for Low Standby Power Applications,\u201d <i>IET Micro &amp; Nano Letters, <\/i> Vol. 11, Issue 12, pp. 828-831, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Dipankar Saha and Santanu Mahapatra &#8220;Atomistic modeling of the metallic-to-semiconducting phase boundaries in monolayer MoS2,&#8221; <i>Applied Physics Letters<\/i>, Vol 108, pp. 253106, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Dipankar Saha and Santanu Mahapatra, &#8220;Theoretical insights on the electro-thermal transport properties of monolayer MoS2 with line defects,&#8221; <i>Journal of Applied Physics<\/i>, Vol. 119, pp. 134304, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Anuja Chanana and Santanu Mahapatra, &#8220;Density Functional Theory based Study of Chlorine Doped WS2 -metal Interface,&#8221; <i> Applied Physics Letters <\/i>, Vol. 108, pp. 103107, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Dipankar Saha and Santanu Mahapatra, &#8220;Analytical Insight into the Lattice Thermal Conductivity and Heat Capacity of Monolayer MoS2,&#8221; <i>Physica E<\/i>, Vol. 83, pp. 455\u2013460, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Anuja Chanana and Santanu Mahapatra, &#8220;Prospects of Zero Schottky Barrier Height in a Graphene Inserted MoS2-Metal Interface,&#8221; <i> Journal of Applied Physics <\/i>, Vol. 119, pp. 014303, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan and Santanu Mahapatra, &#8220;Compact Noise Modeling for Common Double Gate MOSFET Adapted to Gate Oxide Thickness Asymmetry,&#8221; <i>IET Circuits, Devices &amp; Systems <\/i>, Vol. 10, No. 1, pp. 62\u00d067, 2016. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Anuja Chanana and Santanu Mahapatra, &#8220;Theoretical Insights to Niobium Doped Monolayer MoS2-Gold Contact,&#8221; <i> IEEE Transactions on Electron Devices <\/i>, Vol 62, No 7, pp. 2346-2351, 2015. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Amretashis Sengupta, Anuja Chananna and Santanu Mahapatra, \u201cPhonon scattering limited performance of monolayer MoS2 and WSe2 n-MOSFET,\u201d <i>AIP Advances<\/i>, Vol.2, Issue 5, pp. 027101, 2015. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Amretashis Sengupta, Dipankar Saha, Thomas A. Niehaus and Santanu Mahapatra, &#8220;Effect of line defects on the electrical transport properties of monolayer MoS2 sheet,\u201d <i>IEEE Transactions on Nanotechnology<\/i>, Vol 14, No 1, pp. 51-56, 2015. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Anuja Chanana and Santanu Mahapatra, &#8220;First Principle Study of Metal Contact to Monolayer Black Phosphorous,&#8221; <i> Journal of Applied Physics <\/i> Vol.116, pp. 204302 (1-9), 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya, Dipankar Saha, Aveek Bid, and Santanu Mahapatra, &#8220;A Continuous Electrical Conductivity Model for Monolayer Graphene from Near Intrinsic to Far Extrinsic Region,&#8221; <i> IEEE Transactions on Electron Devices <\/i>, Vol. 61, No. 11, pp. 3646 -3653, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Dipankar Saha, Amretashis Sengupta, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Impact of Stone-Wales and lattice vacancy defects on the electro-thermal transport of the free standing structure of metallic ZGNR&#8221;, <i>Journal of Computational Electronics (Springer)<\/i>, Vol. 13, No. 4, pp. 862\u2013871, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan and Santanu Mahapatra, &#8220;A Short Channel Common Double Gate MOSFET Model Adapted to Gate Oxide Thickness Asymmetry\u201d, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 61, No.8, pp. 2732-2737, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ram Krishna Ghosh, Madhuchhanda Brahma, Santanu Mahapatra, &#8220;Germanane : a \u2018Low Effective Mass\u2019- \u2018High Bandgap\u2019 2-D Channel Material for Future FETs\u201d, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 61, No.7, pp 2309-2315, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Anuja Chananna, Amretashis Sengupta and Santanu Mahapatra, \u201cPerformance Analysis of Boron Nitride Embedded Armchair Graphene Nanoribbon MOSFET with Stone-Wales Defects&#8221;, <i>Journal of Applied Physics<\/i>, Vol. 115, pp. 034501, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan and Santanu Mahapatra, &#8220;Continuity Equation Based Nonquasi-static Charge Model for Independent Double Gate MOSFET\u201d <i>Journal of Computational Electronics (Springer)<\/i>, Vol.13, Issue 2, pp 353-359, 2014. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ramkrishna Ghosh and Santanu Mahapatra, &#8220;Monolayer Transition Metal Dichalcogenide Channel Based Tunnel Transistor&#8221;, <i>IEEE Journal of the Electron Devices Society<\/i>, Vol. 1, No. 10, pp. 175-180, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Amretashis Sengupta and Santanu Mahapatra, &#8220;Negative differential resistance and effect of defects and deformations in MoS2 armchair nanoribbon MOSFET\u201d, <i>Journal of Applied Physics<\/i>, Vol. 114, pp. 194513, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Solution of Time Dependent Joule Heat Equation for a Graphene Sheet under Thomson Effect\u201d, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60., No. 10, pp. 3548-3553, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Amretashis Sengupta, Ram Krishna Ghosh, Santanu Mahapatra, &#8220;Performance Analysis of Strained Monolayer MoS2 MOSFET,&#8221; <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60., No. 9., pp. 2782-2787, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ram Krishna Ghosh and Santanu Mahapatra, &#8220;Proposal for Graphene-Boron Nitride Heterobilayer Based Tunnel FET&#8221;, <i>IEEE Transactions on Nanotechnology<\/i>, Vol. 12, No. 5, pp. 665-667, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Modeling of Temperature and Field Dependent Electron Mobility in a Single Layer Graphene Sheet&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol.60, No. 8, pp. 2695 \u2013 2698, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan and Santanu Mahapatra, &#8220;Non-Quasi-Static Charge Model for Common Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60, No.7, pp. 2419-2422, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Amrethashis Sengupta and Santanu Mahapatra, &#8220;Performance limits of transition metal dichalcogenide (MX2) nanotube surround gate ballistic field effect transistors, &#8220;<i>Journal of Applied Physics<\/i>, Vol. 113, pp. 194502, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Thermoelectric Performance of a Single Layer Graphene Sheet for Energy Harvesting&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60, No.6, pp. 2064-2070, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ramkrishna Ghosh, Sitangshu Bhattacharya and Santanu Mahapatra,&#8221;k.p based closed form energy band gap and transport electron effective mass model for [100] and [110] relaxed and strained Silicon nanowire&#8221;, <i>Solid State Electronics<\/i>, Vol. 80, pp. 124-134, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;A physics based flexural phonon dependent thermal conductivity model for single layer graphene&#8221;, <i>IOP Semiconductor Science and Technology<\/i>, Vol. 28, pp. 015009 (1-6), 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ramkrishna Ghosh and Santanu Mahapatra, &#8220;Direct Band-to-band tunneling in reverse biased MoS2 nanoribbon p-n junctions&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60, No.1, pp. 274-279, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Physics-Based Solution for Electrical Resistance of Graphene under Self-Heating Effect&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60, No.1, pp. 502-505, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Aby Abraham, Pankaj Thakur and Santanu Mahapatra, &#8220;Bipolar Poisson Solution for Independent Double-Gate MOSFET&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 60, No.1, pp. 498-501, 2013. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Srivatsava Jandhyala and Santanu Mahapatra, &#8220;Inclusion of the Body Doping in the Compact Models for Fully-Depleted Common Double Gate MOSFET Adapted to Gate-oxide Thickness Asymmetry&#8221;, <i>IET Electronics Letters<\/i>, Vol. 48, No. 13, pp. 794, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Theoretical Estimation of Electro-migration in Metallic Carbon Nanotubes Considering Self-Heating-Effect&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 59, No. 9, pp. 2476-2482, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Srivatsava Jandhyala, Aby Abraham, Costin Anghel and Santanu Mahapatra, &#8220;Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET&#8221;, <i>IEEE Transactions on Electron Devices<\/i> Vol. 59, No. 7, pp. 1974, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ramkrishna Ghosh, Sitangshu Bhattacharya and Santanu Mahapatra,&#8221; Physics based band gap model for relaxed and strained [100] silicon nanowires&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 59, No. 6, pp. 1765-1772, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Srivatsava Jandhyala, Rutwick Kashyap, Costin Anghel and Santanu Mahapatra, &#8220;A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 59, No. 4, pp. 1002-1007, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Aby Abraham, Srivatsava Jandhyala and Santanu Mahapatra, &#8220;Improvements in Efficiency of Surface Potential Computation for Independent DG MOSFET&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 59, No.4, pp. 1199-1202, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya and Santanu Mahapatra,&#8221;Quantum Capacitance in Bilayer Graphene Nanoribbon&#8221;, <i>Physica E<\/i>, Vol. 44, Issues 7\u20138, pp. 1127\u20131131, 2012. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Analytical Solution of Joule Heating Equation for Metallic Single Walled Carbon Nanotube Interconnects&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 58, No. 11, pp. 3991-3996, 2011. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Srivatsava Jandhyala and Santanu Mahapatra, &#8220;An efficient robust algorithm for the surface potential calculation of Independent DG MOSFET&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 58, No. 6, pp. 1663-1671, 2011. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya, Amalraj Rex and Santanu Mahapatra &#8220;Physics Based Thermal Conductivity Model for Metallic Single Walled Carbon Nanotube Interconnects&#8221;, <i>IEEE Electron Device Letters<\/i>, Vol. 32, No. 2, pp. 203-205, 2011. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Pankaj Thakur and Santanu Mahapatra, &#8220;Large Signal Model For Independent DG MOSFET&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 58, No. 1, pp. 46-52, 2011. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rakesh Kumar P and Santanu Mahapatra, \u201cAnalytical Modeling of Quantum Threshold Voltage for Triple Gate MOSFET\u201d, <i>Solid State Electronics<\/i>, Vol. 54, 1586\u20131591 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sudipta Sarkar, Ananda Shankar Roy and Santanu Mahapatra, &#8220;Unified Large and Small Signal Non Quasi-Static Model for Long Channel Symmetric DG MOSFET&#8221;, <i>Solid State Electronics<\/i>, Vol. 54, pp. 1421-1429, 2010 <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya and Santanu Mahapatra, \u201cNegative Differential Conductance and Effective Electron Mass in Highly Asymmetric Ballistic Bilayer Graphene Nanoribbon\u201d <i>Physics Letters A<\/i>, Vol. 374, pp. 2850\u20132855, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya and Santanu Mahapatra, Simplified Theory of Carrier Back-Scattering in Semiconducting Carbon Nanotubes: a Kane&#8217;s Model Approach, <i>Journal of Applied Physics<\/i>, Vol.107, Issue 9, pp. 094314, 2010. Also published in <i>Virtual Journal of Nanoscale Science &amp; Technology<\/i>, Vol. 21, Issue 10, 2010 <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Surya Shankar Dan and Santanu Mahapatra, &#8220;Impact of Energy Quantisation in SET Island on Hybrid CMOS-SET Integrated Circuits&#8221;, <i>IET Circuits Devices Systems<\/i>, Vol. 4, Issue 5, pp. 449\u2013457, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sivakumar Bondada, Soumyendu Raha and Santanu Mahapatra, An efficient reduction algorithm for computation of interconnect delay variability for statistical timing analysis in clock tree planning, <i>Sadhana &#8211; Academy Proceedings in Engineering Science<\/i> Vol. 35, Part 4, pp. 407\u2013418, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Analytical Study of Low Field Diffusive Transport in Highly Asymmetric Bilayer Graphene Nanoribbon&#8221;, Vol. 10, No. 3, pp. 409-416, <i>IEEE Transactions on Nanotechnology<\/i>, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Avinash Sahoo, Pankaj Kumar Thakur, and Santanu Mahapatra, &#8220;A Computationally Efficient Generalized Poisson Solution For Independent Double Gate Transistors&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 57, no.3, pp. 632-636, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rakesh Kumar P and Santanu Mahapatra, &#8220;Quantum Threshold Voltage Modeling of Short Channel Quad Gate Silicon Nanowire Transistor&#8221;, Vol. 10, No. 1, pp. 121-128, <i>IEEE Transactions on Nanotechnology<\/i>, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Surya Shankar Dan and Santanu Mahapatra, &#8220;Analysis of Energy Quantization Effects on Single Electron Transistor Circuits&#8221;, in <i>IEEE Transactions on Nanotechnology<\/i>, Vol.9, No.1, pp. 38-45, 2010. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Surya Shankar Dan and Santanu Mahapatra, &#8220;Impact of Energy Quantization Effects on the Performance of Current-Biased SET Circuits&#8221;, <i>IEEE Transactions on Electron Devices<\/i> , Vol 56, No 8, pp.1562-1566, 2009. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Surya Shankar Dan and Santanu Mahapatra, &#8220;Modeling and Analysis of Energy Quantization Effects on Single Electron Inverter Performance&#8221;, <i>Physica E: Low-dimensional Systems and Nanostructures<\/i>, Vol. 41, Issue 8, Pages 1410-1416, 2009. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Influence of Band Non- Parabolicity on Few Ballistic Properties of III-V Quantum Wire Field Effect Transistors Under Strong Inversion&#8221;, <i>Journal of Computational and Theoretical Nanoscience<\/i>, Vol.6, No.7, pp. 1605-1616, 2009. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Biswajit Ray and Santanu Mahapatra, &#8220;Modeling of Channel Potential and Subthreshold Slop of Symmetric Double Gate Transistor&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 56, No. 2, pp. 260-266, 2009. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Ratul Kumar Baruah and Santanu Mahapatra, &#8220;Justifying threshold voltage definition for undoped body transistors through \u201ccrossover point\u201d concept&#8221;, <i>Physica B<\/i>: Condensed Matter, Volume 404, Issues 8-11, 1 May 2009, Pages 1029-1032.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Sitangshu Bhattacharya, Surya Shankar Dan and Santanu Mahapatra, &#8220;Influence of band non-parabolicity on the quantized gate capacitance in delta-doped MODFED of III-V and related materials,&#8221; <i>Journal of Applied Physics<\/i>, Vol. 104, No. 7, pp. 074304-1 to 074304-9, 2008. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Biswajit Ray and Santanu Mahapatra, &#8220;Modeling and analysis of body potential of cylindrical Gate-All-Around nanowire transistor&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 55, No. 9, pp. 2409-2416, 2008. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Nayan B Patel, Ramesha A and Santanu Mahapatra, &#8220;Drive Current Boosting of n-type Tunnel FET with Strained SiGe layer at Source&#8221;, <i>Microelectronics Journal<\/i> Vol 39, Issue 12, PP. 1671-1677, 2008. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Chaitanya Sathe, Surya Shankar Dan, and Santanu Mahapatra, &#8220;Assessment of SET logic Robustness through Noise Margin Modeling&#8221;, <i>IEEE Transactions on Electron Devices<\/i>, Vol. 55, No. 3, pp. 909-915, 2008.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Serge Ecoffey, Didier Bouvet, Santanu Mahapatra, Gilles Reimbold, and Adrian Mihai Ionescu, &#8220;Electrical Conduction in 10nm-thin Polysilicon Wires from 4K to 400K and their Operation for Hybrid Memory&#8221;, <i>Japanese Journal of Applied Physics Part 1<\/i>, Vol. 45, No. 6, June 2006. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra and Adrian Mihai Ionescu, \u201cRealization of multiple value logic and memory by hybrid SETMOS architecture\u201d, <i>IEEE Transactions in Nanotechnology<\/i>, Vol. 4, No. 6, pp. 705 &#8211; 714, 2005. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Serge Ecoffey, Vincent Pott, Santanu Mahapatra, Didier Bouvet, Pierre Fazan, Adrian Mihai Ionescu, \u201cA Hybrid CMOS-SET co-fabrication Platform Using Nanograin Polysilicon Wires\u201d, <i>Microelectronic Engineering<\/i>, Vol 78-79, pp.239-243, 2005.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Vaivabh Vaish, Christoph Wasshuber, Kaustav Banerjee and Adrian Mihai Ionescu, \u201cAnalytical Modelling of Single Electron Transistor (SET) for Hybrid CMOS-SET Analog IC Design\u201d, <i>IEEE Transactions on Electron Device,<\/i> Vol. 51, No. 11,pp. 1772-1782, 2004. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra and Adrian Mihai Ionescu, \u201cA Novel Elementary Single Electron Transistor Negative Differential Resistance Device\u201d, <i>Japanese Journal of Applied Physics<\/i>, Part 1, Vol. 43, No. 2, pp. 538-539, 2004. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Adrian Mihai Ionescu, Santanu Mahapatra, and Vincent Pott, \u201cHybrid SETMOS Architecture with Coulomb Blockade Oscillations and High Current Drive\u201d, <i>IEEE Electron Device Letters, <\/i>Vol.25, No.6, pp. 411-413, 2004. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Adrian Mihai Ionescu, and Kaustav Banerjee, \u201cA Quasi-Analytical SET Model for Few Electron Circuit Simulation\u201d, <i>IEEE Electron Device Letters, <\/i>Vol.23, No.6, pp. 366-368, June 2002.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Adrian Mihai Ionescu, Kaustav Banerjee and Michel Declercq, \u201cA SET Based Quantizer Circuit for Digital Communications\u201d, <i>IEE Electronics Letters, <\/i>Vol. 38, No. 10, pp. 443-445, May 2002.<\/span><\/li>\n<\/ol>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Patent&#8221; _builder_version=&#8221;4.9.0&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; text_orientation=&#8221;justified&#8221; z_index_tablet=&#8221;0&#8243; text_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; text_text_shadow_vertical_length_tablet=&#8221;0px&#8221; text_text_shadow_blur_strength_tablet=&#8221;1px&#8221; link_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; link_text_shadow_vertical_length_tablet=&#8221;0px&#8221; link_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ul_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ul_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ul_text_shadow_blur_strength_tablet=&#8221;1px&#8221; ol_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; ol_text_shadow_vertical_length_tablet=&#8221;0px&#8221; ol_text_shadow_blur_strength_tablet=&#8221;1px&#8221; quote_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; quote_text_shadow_vertical_length_tablet=&#8221;0px&#8221; quote_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_2_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_2_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_2_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_3_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_3_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_3_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_4_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_4_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_4_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_5_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_5_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_5_text_shadow_blur_strength_tablet=&#8221;1px&#8221; header_6_text_shadow_horizontal_length_tablet=&#8221;0px&#8221; header_6_text_shadow_vertical_length_tablet=&#8221;0px&#8221; header_6_text_shadow_blur_strength_tablet=&#8221;1px&#8221; box_shadow_horizontal_tablet=&#8221;0px&#8221; box_shadow_vertical_tablet=&#8221;0px&#8221; box_shadow_blur_tablet=&#8221;40px&#8221; box_shadow_spread_tablet=&#8221;0px&#8221; use_border_color=&#8221;off&#8221;]<\/p>\n<h3><span style=\"color: #000066;font-family: Arial;font-size: medium\">Patent<\/span><\/h3>\n<p align=\"justify\"><span style=\"font-family: Arial;font-size: small\"> R.Verma, S. Bhattacharya and S. Mahapatra, &#8221; A graphene based thermoelectric generator&#8221;, <i>Indian patent number 404071, 28th August 2022\u00a0<\/i>.<\/span><\/p>\n<p>&nbsp;<\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text admin_label=&#8221;Conference&#8221; _builder_version=&#8221;3.27.4&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; text_orientation=&#8221;justified&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;]<\/p>\n<h3><span style=\"color: #000066;font-family: Arial;font-size: medium\">Conference Publications<\/span><\/h3>\n<ol>\n<li><span style=\"font-family: Arial;font-size: small\">Madhuchhanda Brahma, Arnab Kabiraj and Santanu Mahapatra, \u2018Insights on anisotropic dissipative quantum transport in n-type Phosphorene MOSFET\u2019,\u00a0IEEE International Conference on VLSI Design 2019, Delhi, India.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sahil Garg, Bipan Kaushal, Arun K. Singh, Sanjeev Kumar and Santanu Mahapatra, \u201cParametric Optimization of Self-Switching Diode\u201d, \u00a0IEEE Nanotechnology Materials and Devices Conference (NMDC) 2018, USA.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Ananda Sankar Chakraborty, Srivatsava Jandhalya and Santanu Mahapatra, \u2018Analytical Surface Potential Solution for Low Effective Mass Channel Common Double Gate MOSFET \u2019,\u00a0Workshop of Compact Modeling<strong>,\u00a0<\/strong>TechConnect Briefs, Volume: 4, Pages: 224 \u2013 227, 2018.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Richa Chakravarty, Dipankar Saha and Santanu Mahapatra, \u201cNew Asymmetric Atomistic Model for the Analysis of Phase-engineered MoS2-Gold Top Contact\u201d,\u00a0<em>IEEE International Conference on VLSI Design 2018<\/em>, Pune, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Anuja Chanana, Amretashis Sengupta, and Santanu Mahapatra, &#8220;Analysis of Vacancy Defects in Hybrid Graphene-Boron Nitride Armchair Nanoribbon Based n-MOSFET at Ballistic Limit,&#8221; <i>International Workshop on Computational Electronics (IWCE) 2015.<\/i>, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Chethan Kumar M, Neha Sharan, and Santanu Mahapatra, &#8220;indDG: A New Compact Model for Common Double Gate MOSFET adapted to Gate Oxide Thickness Asymmetry,&#8221; <i> IEEE CONECCT 2015 [Best paper award] <\/i>, Bangalore, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan, and Santanu Mahapatra, &#8220;NQS modeling of Independent DG MOSFET by relaxation time approximation approach,&#8221; <i>Workshop on Compact Modeling<\/i>, 2014, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Dipankar Saha and Santanu Mahapatra, &#8220;Modeling of sheet-concentration and temperature-dependent resistivity of a suspended monolayer graphene,&#8221; <i>IEEE International Conference on Emerging Electronics 2014<\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Neha Sharan and Santanu Mahapatra, &#8220;Small signal Non Quasi-static model for Common Double Gate MOSFET adapted to gate oxide thickness asymmetry,&#8221; <i>IEEE International Conference on VLSI Design 2014<\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Rekha Verma, Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Electro-thermal Aspects in Carbon Based Interconnects,&#8221; <i>TechConnect World, Summit and Showcase 2013, Nanotech Conference and Expo 2013 <\/i>, Washington DC, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\"> Pankaj Kumar Thakur , and Santanu Mahapatra, &#8220;Modeling and Analysis of MOS Capacitor Controlled by Independent Double Gates,&#8221; <i>Workshop on Compact Modeling<\/i>, 2012, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sudipta Sarkar, Ananda Shankar Roy and Santanu Mahapatra, &#8220;A Non Quasi-Static Small Signal Model for Long Channel Symmetric DG MOSFET&#8221;, <i>International Conference on VLSI Design 2010 <\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Sitangshu Bhattacharya and Santanu Mahapatra, &#8220;Does Nanotubes and Nanowires Exhibit Negative Capacitances?&#8221;, appearing in <i> International Workshop on Physics for Semiconductor Devices (IWPSD) 2009 <\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Surya Shankar Dan and Santanu Mahapatra, &#8220;Impact of Energy Quantization in SET island on Hybrid CMOS-SET Integrated Circuits&#8221;, appearing in <i> International Workshop on Physics for Semiconductor Devices (IWPSD) 2009 <\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Surya Sankar Dan and Santanu Mahapatra, &#8220;Analysis of the energy quantization effects on SET inverter performance using noise margin modeling and monte carlo simulation&#8221;, <i>International Conference on VLSI Design 2009<\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Ratul Baruah and Santanu Mahapatra, \u201cConcept of crossover point and its application on threshold voltage definition for undoped-body transistors\u201d, <i>International Conference On VLSI Design 2009<\/i>, India. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Ramesha A and Nayan Patel, \u201cTunnel FET: Nano-Scale Switch For Low Standby Power Applications\u201d, <i>International Conference on Nano and Microelectronics (ICONAME) 2008<\/i>, Puducherry, India <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswajit Ray and Santanu Mahapatra, &#8220;A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor&#8221;, <i>International Conference on VLSI Design 2008<\/i>, Hyderabad, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswajit Ray and Santanu Mahapatra, &#8220;Analytical Potential Model for Omega Gate Cylindrical Nanowire Transistor&#8221;, <i>International Conference on Nano and Microelectronics 2008<\/i>, Puducherry, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Nayan B Patel and Santanu Mahapatra, \u201cPerformance Enhancement of the Tunnel Field Effect Transistor using SiGe Source, <i>International Workshop on Physics for Semi-conductor Devices 2007<\/i>, Mumbai, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Biswajit Ray, Shubhakar, and Santanu Mahapatra, \u201cNecessity for quatum simulation for future technology nodes, <i>International Workshop on Physics for Semi-conductor Devices 2007<\/i>, Mumbai, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Shubhakar, Biswajit Ray and Santanu Mahapatra, &#8220;Challenges Posed to the State of the Art Device Simulators in Nanoscale Regime&#8221;, <i>VLSI Design And Test Symposium 200<\/i>7, Kolkata, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Shubhakar and Santanu Mahapatra, &#8220;Effects of material properties and device parameters on the performance of Silicon nanowire FET&#8221;, <i>ANM-2007, International conference<\/i>, IIT Bombay, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Ashish Pal, Saptarshi Das, Biswajit Ray and Santanu Mahapatra, &#8220;A New Spice Simulator for Single Electron Transistor Based Integrated Circuits&#8221;, <i>VLSI Design And Test Symposium 2007<\/i>, Kolkata, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Nayan B. Patel and Santanu Mahapatra, &#8220;A Simulation Based Study and Analysis of Double Gate Tunnel FET Performance for Low Stand-By Power Applications&#8221;, <i>VLSI Design And Test Symposium 2007<\/i>, Kolkata, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Chaitanya Sathe and Santanu Mahapatra, &#8220;Modeling and Analysis of Noise Margin in SET Logic&#8221;, <i>International Conference on VLSI Design 2007<\/i>, Bangalore, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Nayan B. Patel and Santanu Mahapatra, &#8220;Tunnel FET &#8211; A Novel Device with Sub-Threshold Swing less than 60 mV\/decade for Future Low Stand-by Power Applications&#8221;, <i>National Conference on VLSI and Communication Engineering 2007<\/i>, Kottayam, India<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Serge Ecoffey, Vincent Pott, Didier Bouvet, Marco Mazza,Santanu Mahapatra, Alexandre Schmid, Yusuf Leblebici, Michel J. Declercq, Adrian M. Ionescu, \u201cNano-Wires for Room Temperature Operated Hybrid CMOS-NANO Integrated Circuits\u201d, <i>International Solid State Circuits Conference (ISSCC)<\/i>, Vol. 1, pp. 260-263, 2005.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Adrian Mihai Ionescu, Vincent Pott, Serge Ecoffey, Santanu Mahapatra, Kirsten Moselund, Paolo Dainesi, Kathy Buchheit, Marco Mazza, \u201cEmerging nanoelectronics: multi-functional nanowire\u201d, <i>Proc. of CAS 2004<\/i>, vol. 1, pp. 3-8, October, Romania.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Serge Ecoffey, Vincent Pott, Santanu Mahapatra, Didier Bouvet, Pierre Fazan, Adrian Mihai Ionescu, \u201cA Hybrid CMOS-SET co-fabrication Platform Using Nanograin Polysilicon Wires\u201d, <i>Micro and Engineering (MNE) 2004<\/i>, September, Rotterdam, Nederland.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra and Adrian Mihai Ionescu, &#8220;A novel single electron SRAM architecture&#8221;, <i>Proc. of IEEE NANO 2004<\/i>, August, Munich, Germany.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Vincent Pott, Serge Ecoffey, Alexandre Schmid, Christoph Wasshuber, Kaustav Banerjee, Yusuf Leblebici, Michel Declercq, Joseph Tringe, Adrian Mihai Ionescu, \u201cSETMOS: A Novel True Hybrid SET-CMOS High Current Coulomb Blockade Oscillation Cell for Future Nano-Scale Analog ICs\u201d, <i>IEEE International Electron Device Meeting (IEDM) 2003<\/i>, December, pp. 703-706, Washington DC, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian Mihai Ionescu, \u201cA CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits\u201d, <i>International Conference on Computer Aided Design (ICCAD) 2003<\/i>, pp. 497-502, November, San Jose, USA. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Vincent Pott, and Adrian Mihai Ionescu, \u201cFew Electron Negative Differential Resistance (NDR) Devices\u201d, <i>International Semiconductor Conference (CAS)<\/i> 2003, Vol.1, pp. 51-54, September, Sinaia, Romania.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Vincent Pott, Adrian Mihai Ionescu, \u201cSETMOS-A High Current Coulomb Blockade Oscillation Device\u201d, <i>European Solid-State Device Research Conference (ESSDERC)<\/i> 2003, pp. 183-186, September, Estoril, Portugal. <\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Adrian Ionescu, Kaustav Banerjee and Michel Declercq, \u201cModelling and analysis of power dissipation in Single Electron logic\u201d, <i>IEEE International Electron Device Meeting (IEDM)<\/i> 2002, pp. 323-326, December, San Francisco, USA.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Adrian Ionescu and Kaustav Banerjee, \u201cQuasi-analytical modelling of drain current and conductances of single electron transistors with mib\u201d, <i>32<sup>nd<\/sup> European Solid-State Device Research Conference (ESSDERC) 2002<\/i>, pp. 391-394, September, Florence, Italy.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Adrian Ionescu, Michel Declercq, Santanu Mahapatra, Kaustav Banerjee, and Jacques Gautier, \u201cFew Electron Devices: Towards Hybrid CMOS-SET Integrated Circuits\u201d, 39<sup>th<\/sup> <i>Design Automation Conference (DAC) 2002<\/i>, pp. 88-93, June, New Orleans, Louisiana, USA.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Adrian Ionescu, Michel Declercq, Santanu Mahapatra and Kaustav Banerjee, \u201cTeaching microelectronics in the silicon ICs showstopper zone: a course on Ultimate devices and circuits: towards quantum electronics\u201d, 4<sup>th<\/sup> <i>European workshop on Microelectronics Education (EWME) 2002<\/i>, May, Spain.<\/span><\/li>\n<li><span style=\"font-family: Arial;font-size: small\">Santanu Mahapatra, Adrian Ionescu, Kaustav Banerjee and Michel Declercq, \u201cA SET Quantizer Circuit aiming at Digital Communication System\u201d, <i>IEEE International Symposium on Circuits and Systems (ISCAS) 2002<\/i>, pp. V860-V863, May, Scottsdale, Arizona.<\/span><\/li>\n<\/ol>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section]<\/p>\n","protected":false},"excerpt":{"rendered":"<p>[et_pb_section fb_built=&#8221;1&#8243; admin_label=&#8221;section&#8221; module_id=&#8221;home&#8221; _builder_version=&#8221;3.22&#8243; transparent_background=&#8221;off&#8221; make_fullwidth=&#8221;off&#8221; use_custom_width=&#8221;off&#8221; width_unit=&#8221;on&#8221;][et_pb_row _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;4_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_text _builder_version=&#8221;3.27.4&#8243; text_font=&#8221;Vollkorn||||&#8221; text_font_size=&#8221;60&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221; use_border_color=&#8221;off&#8221; border_color=&#8221;#ffffff&#8221; border_style=&#8221;solid&#8221;] Professor Santanu Mahapatra [\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row column_structure=&#8221;1_4,3_4&#8243; admin_label=&#8221;row&#8221; _builder_version=&#8221;3.25&#8243; background_size=&#8221;initial&#8221; background_position=&#8221;top_left&#8221; background_repeat=&#8221;repeat&#8221;][et_pb_column type=&#8221;1_4&#8243; _builder_version=&#8221;3.0.47&#8243; custom_padding=&#8221;|||&#8221; custom_padding__hover=&#8221;|||&#8221;][et_pb_image src=&#8221;http:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-content\/uploads\/sites\/9\/2021\/08\/SM2021.jpg&#8221; align=&#8221;center&#8221; align_tablet=&#8221;center&#8221; align_phone=&#8221;&#8221; align_last_edited=&#8221;on|desktop&#8221; _builder_version=&#8221;4.9.0&#8243; vertical_offset_tablet=&#8221;0&#8243; horizontal_offset_tablet=&#8221;0&#8243; max_width=&#8221;200px&#8221; animation_style=&#8221;slide&#8221; animation_direction=&#8221;left&#8221; animation_duration=&#8221;500ms&#8221; animation_intensity_slide=&#8221;10%&#8221; z_index_tablet=&#8221;0&#8243; box_shadow_horizontal_tablet=&#8221;0px&#8221; [&hellip;]<\/p>\n","protected":false},"author":5,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_et_pb_use_builder":"on","_et_pb_old_content":"","_et_gb_content_width":""},"_links":{"self":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/pages\/37"}],"collection":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/comments?post=37"}],"version-history":[{"count":221,"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/pages\/37\/revisions"}],"predecessor-version":[{"id":363,"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/pages\/37\/revisions\/363"}],"wp:attachment":[{"href":"https:\/\/faculty.dese.iisc.ac.in\/santanu\/wp-json\/wp\/v2\/media?parent=37"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}